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44
Revision 3.0
G
Signal Definitions
(Continued)
AA1
IDE_RST#
O
O
1/4
V
IO
PMR[24] = 0
TFTDCK
O
O
1/4
PMR[24] = 1
AA2
IDE_DATA7
I/O
IN
TS1
,
TS
1/4
V
IO
PMR[24] = 0
INTD#
I
IN
TS
PMR[24] = 1
AA3
IDE_DATA6
I/O
IN
TS1
,
TS
1/4
V
IO
PMR[24] = 0
IRQ9
I
IN
TS1
PMR[24] = 1
AA4
IDE_DATA5
I/O
IN
TS1
,
TS
1/4
V
IO
PMR[24] = 0
CLK27M
O
O
1/4
PMR[24] = 1
AA28
SDCLK2
O
O
2/5
V
IO
---
AA29
6
MD61
I/O
IN
T
,
TS
2/5
V
IO
---
AA30
6
MD62
I/O
IN
T
,
TS
2/5
V
IO
---
AA31
6
MD63
I/O
IN
T
,
TS
2/5
V
IO
---
AB1
IDE_DATA4
I/O
IN
TS1
,
TS
1/4
V
IO
PMR[24] = 0
FP_VDD_ON
O
O
1/4
PMR[24] = 1
AB2
V
SS
GND
---
---
---
AB3
V
IO
PWR
---
---
---
AB4
IDE_DATA3
I/O
IN
TS1
,
TS
1/4
V
IO
PMR[24] = 0
TFTD12
O
O
1/4
PMR[24] = 1
AB28
6
MD24
I/O
IN
T
,
TS
2/5
V
IO
---
AB29
V
IO
PWR
---
---
---
AB30
V
SS
GND
---
---
---
AB31
DQM7
O
O
2/5
V
IO
---
AC1
IDE_DATA1
I/O
IN
TS1
,
TS
1/4
V
IO
PMR[24] = 0
TFTD16
O
O
1/4
PMR[24] = 1
AC2
IDE_DATA2
I/O
IN
TS1
,
TS
1/4
V
IO
PMR[24] = 0
TFTD14
O
O
1/4
PMR[24] = 1
AC3
IDE_DATA0
I/O
IN
TS1
,
TS
1/4
V
IO
PMR[24] = 0
TFTD6
O
O
1/4
PMR[24] = 1
AC4
IDE_DREQ0
I
IN
TS1
V
IO
PMR[24] = 0
TFTD8
O
O
1/4
PMR[24] = 1
AC28
6
MD25
I/O
IN
T
,
TS
2/5
V
IO
---
AC29
6
MD26
I/O
IN
T
,
TS
2/5
V
IO
---
AC30
6
MD27
I/O
IN
T
,
TS
2/5
V
IO
---
AC31
DQM3
O
O
2/5
V
IO
---
AD1
IDE_IORDY0
I
IN
TS1
V
IO
PMR[24] = 0
TFTD11
O
O
1/4
PMR[24] = 1
Ball
No.
Signal Name
I/O
(PU/PD)
Buffer
1
Type
Power
Rail
Configuration
AD2
IDE_IOW0#
O
O
1/4
V
IO
PMR[24] = 0
TFTD9
O
O
1/4
PMR[24] = 1
AD3
IDE_ADDR0
O
O
1/4
V
IO
PMR[24] = 0
TFTD3
O
O
1/4
PMR[24] = 1
AD4
IDE_DACK0#
O
O
1/4
V
IO
PMR[24] = 0
TFTD0
O
O
1/4
PMR[24] = 1
AD28
6
MD52
I/O
IN
T
,
TS
2/5
V
IO
---
AD29
6
MD29
I/O
IN
T
,
TS
2/5
V
IO
---
AD30
6
MD30
I/O
IN
T
,
TS
2/5
V
IO
---
AD31
6
MD31
I/O
IN
T
,
TS
2/5
V
IO
---
AE1
IDE_ADDR1
O
O
1/4
V
IO
PMR[24] = 0
TFTD2
O
O
1/4
PMR[24] = 1
AE2
V
SS
GND
---
---
---
AE3
V
IO
PWR
---
---
---
AE4
V
SS
GND
---
---
---
AE28
V
SS
GND
---
---
---
AE29
V
IO
PWR
---
---
---
AE30
V
SS
GND
---
---
---
AE31
6
MD28
I/O
IN
T
,
TS
2/5
V
IO
---
AF1
IRQ14
I
IN
TS1
V
IO
PMR[24] = 0
TFTD1
O
O
1/4
PMR[24] = 1
AF2
IDE_CS0#
O
O
1/4
V
IO
PMR[24] = 0
TFTD5
O
O
1/4
PMR[24] = 1
AF3
SOUT1
O
O
8/8
V
IO
---
CLKSEL1
I
(PD
100
)
IN
STRP
Strap (See Table 2-
6 on page 51.)
AF4
OVER_CUR#
I
IN
TS
V
IO
---
AF28
6
MD50
I/O
IN
T
,
TS
2/5
V
IO
---
AF29
6
MD49
I/O
IN
T
,
TS
2/5
V
IO
---
AF30
6
MD54
I/O
IN
T
,
TS
2/5
V
IO
---
AF31
6
MD53
I/O
IN
T
,
TS
2/5
V
IO
---
AG1
GPIO18
I/O
(PU
22.5
)
IN
TS
,
O
8/8
V
IO
PMR[16] = 0
DTR1#/BOUT1
O
(PU
22.5
)
O
8/8
PMR[16] =1
AG2
SIN1
I
IN
TS
V
IO
---
AG3
X27I
I
WIRE
V
IO
---
AG4
PLL6B
I/O
IN
TS
,
TS
2/5
V
IO
PMR[29] = 0
TEST1
O
O
2/5
PMR[29] = 1
AG28
6
MD21
I/O
IN
T
,
TS
2/5
V
IO
---
Ball
No.
Signal Name
I/O
(PU/PD)
Buffer
1
Type
Power
Rail
Configuration
Table 2-4.
481-TEPBGA Ball Assignment - Sorted by Ball Number (Continued)