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290
Revision 3.0
G
Core Logic Module
(Continued)
Index 14h-2Bh
Reserved
Reset Value: 00h
Index 2Ch-2Dh
Subsystem Vendor ID (RO)
Reset Value: 0E11h
Index 2Eh-2Fh
Subsystem ID (RO)
Reset Value: A0F8h
Index 30h-3Bh
Reserved
Reset Value: 00h
Index 3Ch
This register identifies the system interrupt controllers to which the device’s interrupt pin is connected. The value of this register is used
by device drivers and has no direct meaning to USB.
Interrupt Line Register (R/W)
Reset Value: 00h
Index 3Dh
This register selects which interrupt pin the device uses. USB uses INTA# after reset. INTB#, INTC# or INTD# can be selected by writ-
ing 2, 3 or 4, respectively.
Interrupt Pin Register (R/W)
Reset Value: 01h
Index 3Eh
This register specifies how long a burst is needed by the USB, assuming a clock rate of 33 MHz. The value in this register specifies a
period of time in units of 1/4 microsecond.
Min. Grant Register (RO)
Reset Value: 00h
Index 3Fh
This register specifies how often (in units of 1/4 microsecond) the USB needs access to the PCI bus assuming a clock rate of 33 MHz.
Max. Latency Register (RO)
Reset Value: 50h
Index 40h-43h
Used for internal debug and test purposes only.
ASIC Test Mode Enable Register (R/W)
Reset Value: 000F0000h
Index 44h
ASIC Operational Mode Enable Register (R/W)
Reset Value: 00h
7:1
Write Only.
Read as 0s.
0
Data Buffer Region 16
0: The size of the region for the data buffer is 32 bytes.
1: The size of the region for the data buffer is 16 bytes.
Index 45h-FFh
Reserved
Reset Value: 00h
Table 5-41. PCIUSB: USB PCI Configuration Registers (Continued)
Bit
Description