- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98145 > ST7267C8T1/XXX (STMICROELECTRONICS) 16-BIT, MROM, 30 MHz, RISC MICROCONTROLLER, PQFP48 PDF資料下載
參數(shù)資料
| 型號(hào)： | ST7267C8T1/XXX |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, MROM, 30 MHz, RISC MICROCONTROLLER, PQFP48 |
| 封裝： | 7 X 7 MM, LEAD FREE, TQFP-48 |
| 文件頁數(shù)： | 9/189頁 |
| 文件大?。?/td> | 1643K |
| 代理商： | ST7267C8T1/XXX |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁當(dāng)前第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁第170頁第171頁第172頁第173頁第174頁第175頁第176頁第177頁第178頁第179頁第180頁第181頁第182頁第183頁第184頁第185頁第186頁第187頁第188頁第189頁
ST7267C8 ST7267R8
106/189
When the AutoSet (INCSRM) feature is enabled,
the IPR bit (INCSRL.bit0) will be automatically set
when a packet of INMAXPR bytes has been load-
ed into the FIFO. This is particularly useful when
DMA is used to load the FIFO as it avoids the need
for any processor intervention when loading indi-
vidual packets during a large Bulk transfer.
10.5.12 Bulk OUT Endpoint
A Bulk OUT endpoint is used to transfer non-peri-
odic data from the host to the function controller.
Three optional features are available for use with a
Bulk OUT endpoint:
■ Double packet buffering
If the value written to the OUTMAXP register is
less than, or equal to, half the size of the FIFO al-
located to the endpoint, double packet buffering
will be automatically enabled. When enabled, up
to two packets can be stored in the FIFO.
■ DMA
If DMA is enabled for the endpoint, a DMA request
will be generated whenever the endpoint has a
packet in its FIFO. This feature can be used to al-
low an external DMA controller to unload packets
from the FIFO without processor intervention.
■ AutoClear
When the AutoClear feature is enabled, the OPR
bit (OutCSR.D0) will be automatically cleared
when a packet of OUTMAXP bytes has been un-
loaded from the FIFO. This is particularly useful
when DMA is used to unload the FIFO as it avoids
the need for any processor intervention when un-
loading individual packets during a large Bulk
transfer.
10.5.13 Interrupt IN Endpoint
An Interrupt IN endpoint is used to transfer period-
ic data from the function controller to the host.
An Interrupt IN endpoint uses the same protocol
as a Bulk IN endpoint and can be used the same
way. However, though DMA can be used, it offers
little benefit as Interrupt endpoints are usually ex-
pected to transfer all their data in a single packet.
Interrupt IN endpoints also support one feature
that Bulk IN endpoints do not, in that they support
continuous toggling of the data toggle bit. This fea-
ture is enabled by setting the FDT bit in the INCS-
RM register. When this bit is set to 1, the USB con-
troller will consider the packet as having been suc-
cessfully sent and toggle the data bit for the end-
point, regardless of whether an ACK was received
from the host.
10.5.14 Interrupt OUT endpoint
An Interrupt OUT endpoint is used to transfer peri-
odic data from the host to a function controller.
An Interrupt OUT endpoint uses almost the same
protocol as a Bulk OUT endpoint and can be used
the same way. The one difference is that Interrupt
endpoints do not support PING flow control. This
means that the USB controller should never re-
spond with a NYET handshake, only ACK/NAK/
STALL. To ensure this, the DNY bit in the OUTC-
SRM register should be set to 1 to disable the
transmission of NYET handshakes in High-speed
mode.
Though DMA can be used with an Interrupt OUT
endpoint, it generally offers little benefit as Inter-
rupt endpoints are usually expected to transfer all
their data in a single packet.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ST72774S9T1/XXX | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP44 |
| ST72E734J6D0 | 8-BIT, UVPROM, 8 MHz, MICROCONTROLLER, CDIP42 |
| ST72T774S9T1 | 8-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PQFP44 |
| ST7294C6B6 | 8-BIT, MROM, 4 MHz, MICROCONTROLLER, PDIP28 |
| ST72T94C6M6 | 8-BIT, OTPROM, MICROCONTROLLER, PDSO28 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ST72681/R12 | 制造商:STMicroelectronics 功能描述:CONTROLLER FOR HIGH-PERFORMANCE BUS-POWERED USB 2.0 FLASH DR - Trays |
| ST72681/S13 | 制造商:STMicroelectronics 功能描述:CONTROLLER FOR HIGH-PERFORMANCE - Trays |
| ST7271 | 制造商:Panasonic Industrial Company 功能描述:IC |
| ST7271N5B1-CLF | 制造商:STMicroelectronics 功能描述: |
| ST727X4-EMU2B | 制造商:STMicroelectronics 功能描述:REALTIME EMULATOR BOARD - Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。