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TMS320TCI6482
Communications Infrastructure Digital Signal Processor
SPRS246F–APRIL 2005–REVISED MAY 2007
Table 8-7. EDMA3 Transfer Controller 1 Registers (continued)
HEX ADDRESS RANGE
02A2 8394
02A2 8398 - 02A2 83BC
02A2 83C0
02A2 83C4
02A2 83C8
02A2 83CC
02A2 83D0
02A2 83D4
02A2 83D8 - 02A2 FFFF
ACRONYM
DFMPPRXY2
-
DFOPT3
DFSRC3
DFCNT3
DFDST3
DFBIDX3
DFMPPRXY3
-
REGISTER NAME
Destination FIFO Memory Protection Proxy Register 2
Reserved
Destination FIFO Options Register 3
Destination FIFO Source Address Register 3
Destination FIFO Count Register 3
Destination FIFO Destination Address Register 3
Destination FIFO BIDX Register 3
Destination FIFO Memory Protection Proxy Register 3
Reserved
Table 8-8. EDMA3 Transfer Controller 2 Registers
HEX ADDRESS RANGE
02A3 0000
02A3 0004
02A3 0008 - 02A3 00FC
02A3 0100
02A3 0104 - 02A3 011C
02A3 0120
02A3 0124
02A3 0128
02A3 012C
02A3 0130
02A3 0134 - 02A3 013C
02A3 0140
02A3 0144 - 02A3 023C
02A3 0240
02A3 0244
02A3 0248
02A3 024C
02A3 0250
02A3 0254
02A3 0258
02A3 025C
02A3 0260
02A3 0264 - 02A3 027C
02A3 0280
02A3 0284
02A3 0288
02A3 028C - 02A3 02FC
02A3 0300
02A3 0304
02A3 0308
02A3 030C
02A3 0310
02A3 0314
02A3 0318 - 02A3 033C
ACRONYM
PID
TCCFG
-
TCSTAT
-
ERRSTAT
ERREN
ERRCLR
ERRDET
ERRCMD
-
RDRATE
-
SAOPT
SASRC
SACNT
SADST
SABIDX
SAMPPRXY
SACNTRLD
SASRCBREF
SADSTBREF
-
DFCNTRLD
DFSRCBREF
DFDSTBREF
-
DFOPT0
DFSRC0
DFCNT0
DFDST0
DFBIDX0
DFMPPRXY0
-
REGISTER NAME
Peripheral Identification Register
EDMA3TC Configuration Register
Reserved
EDMA3TC Channel Status Register
Reserved
Error Register
Error Enable Register
Error Clear Register
Error Details Register
Error Interrupt Command Register
Reserved
Read Rate Register
Reserved
Source Active Options Register
Source Active Source Address Register
Source Active Count Register
Source Active Destination Address Register
Source Active Source B-Index Register
Source Active Memory Protection Proxy Register
Source Active Count Reload Register
Source Active Source Address B-Reference Register
Source Active Destination Address B-Reference Register
Reserved
Destination FIFO Set Count Reload
Destination FIFO Set Destination Address B Reference Register
Destination FIFO Set Destination Address B Reference Register
Reserved
Destination FIFO Options Register 0
Destination FIFO Source Address Register 0
Destination FIFO Count Register 0
Destination FIFO Destination Address Register 0
Destination FIFO BIDX Register 0
Destination FIFO Memory Protection Proxy Register 0
Reserved
C64x+ Peripheral Information and Electrical Specifications
118
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