參數(shù)資料
型號: VCT3801A
廠商: MICRONAS SEMICONDUCTOR HOLDING AG
英文描述: Video/Controller/Teletext IC Family
中文描述: 視頻/控制/圖文電視IC系列
文件頁數(shù): 123/172頁
文件大?。?/td> 2243K
代理商: VCT3801A
ADVANCE INFORMATION
VCT 38xxA
Micronas
123
5.17.A/D Converter (ADC)
This 10-bit analog to digital converter allows the con-
version of an analog voltage in the range of 0 to U
Ref
into a digital value. A multiplexer connects the ADC to
one of 15 analog input ports. A sample-and-hold circuit
holds the analog voltage during conversion. The dura-
tion of the sampling time is programmable. The A/D
conversion is done by a charge balance A/D converter
using successive approximation.
5.17.1.Features
– A/D converter with 10-bit resolution.
– Successive approximation, charge balance type.
– Input multiplexer with 15 analog channels.
– Sample and hold circuit.
– 4/8/16/32
μ
s conversion selectable for optimum
throughput/accuracy balance.
– Zero standby current, 300
μ
A active current.
Fig. 5–4:
Block Diagram of the ADC
5.17.2.Operation
After reset, the module is off (zero standby current).
The module is enabled by the flag SR1.ADC. The user
must ensure that the flag End of Conversion (EOC) in
register AD0 is true, before he starts to operate the
module.
A write access to register AD0 indicating sample time
and channel number starts the conversion. The flag
EOC signalizes the end of conversion. The 10-bit
result is stored in the registers AD1 (8 MSB) and AD0.
The conversion rate depends on the software, the
oscillator frequency and the programmed sample time.
The ADC module is not affected by CPU Slow mode.
P10-17
P20-26
A
D
S&H
x
x
x
x
TSAMP
CHANNEL
AD0
AD1
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
9
8
7
4
3
2
1
0
VSUPS
0
1
GNDS
4
SR1.ADC
EOC
CMPO
CMPO
Interrupt
Source
2
10
r
w
r
5
6
MUX
15
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