參數(shù)資料
型號(hào): VCT3801A
廠商: MICRONAS SEMICONDUCTOR HOLDING AG
英文描述: Video/Controller/Teletext IC Family
中文描述: 視頻/控制/圖文電視IC系列
文件頁(yè)數(shù): 31/172頁(yè)
文件大?。?/td> 2243K
代理商: VCT3801A
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ADVANCE INFORMATION
VCT 38xxA
Micronas
31
2.12.6.Protection Circuitry
Picture tube and drive stage protection is provided
through the following measures:
– Vertical flyback protection input:
This pin searches for a negative edge in every field,
otherwise the RGB drive signals are blanked.
– Drive shutoff during flyback:
This feature can be selected by software.
– Safety input pin:
This input has two thresholds. Between zero and the
lower threshold, normal functioning takes place.
Between the lower and the higher threshold, the
RGB signals are blanked. Above the higher thresh-
old, the RGB signals are blanked and the horizontal
drive is shut off. Both thresholds have a small hys-
teresis.
Fig. 2–25:
Vertical and East/West deflection waveforms
2.13.Reset Function
Reset of all VDP functions is performed by the RESQ
pin. When this pin becomes active, all internal regis-
ters and counters are lost. The TV controller can acti-
vate the RESQ pin by software (see Section 5.7.2. on
page 90).
When the RESQ pin is released, the internal reset is
still active for 4
μ
s. After that time, the initialization of
all required registers is performed by the internal Fast
Processor. This takes approximately 60
μ
s. During this
initialization procedure it is not possible to access the
VDP via the I
2
C interface.
The VDP has clock and voltage supervision circuits to
generate a stable HOUT signal. The voltage supervi-
sion activates an internal reset signal when the supply
for the digital circuits (VSUP
D
) goes below ~2.5 V for
more than 50 ns. This reset signal is extended by
50
μ
s after VSUP
D
is back again.
2.14.Standby and Power-On
The VDP does not have a standby mode. To disable all
the analog and digital video functions, it is necessary
to switch off the supplies for analog front-end
(VSUP
AF
), analog back-end (VSUP
AB
) and digital
circuitry (VSUP
D
).
a,b,c,d,e
0,0,1,0,0
0,0,0,0,1
0,0,1,1,1
East/West:
a,b,c,d
0,1,0,0
0,1,1,0
0,1,0,1
Vertical:
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