參數(shù)資料
型號: 56F8014
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: 16-bit Digital Signal Controllers
中文描述: 16位數(shù)字信號控制器
文件頁數(shù): 45/124頁
文件大?。?/td> 1878K
代理商: 56F8014
Register Descriptions
56F8014 Technical Data, Rev. 3
Freescale Semiconductor
Preliminary
45
5.6 Register Descriptions
A register address is the sum of a base address and an address offset. The base address is defined at the
system level and the address offset is defined at the module level. The ITCN module has 16 registers.
Table 5-2 ITCN Register Summary
(ITCN_BASE = $00 F060)
Register
Acronym
Base Address +
Register Name
Section Location
IPR0
$0
Interrupt Priority Register 0
5.6.1
IPR1
$1
Interrupt Priority Register 1
5.6.2
IPR2
$2
Interrupt Priority Register 2
5.6.3
IPR3
$3
Interrupt Priority Register 3
5.6.4
IPR4
$4
Interrupt Priority Register 4
5.6.5
VBA
$5
Vector Base Address Register
5.6.6
FIM0
$6
Fast Interrupt Match 0 Register
5.6.7
FIVAL0
$7
Fast Interrupt 0 Vector Address Low Register
5.6.8
FIVAH0
$8
Fast Interrupt 0 Vector Address High Register
5.6.9
FIM1
$9
Fast Interrupt Match 1 Register
5.6.10
FIVAL1
$A
Fast Interrupt 1 Vector Address Low Register
5.6.11
FIVAH1
$B
Fast Interrupt 1 Vector Address High Register
5.6.12
IRQP0
$C
IRQ Pending Register 0
5.6.13
IRQP1
$D
IRQ Pending Register 1
5.6.14
IRQP2
$E
IRQ Pending Register 2
5.6.15
Reserved
ICTRL
$12
Interrupt Control Register
5.6.16
Reserved
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