參數(shù)資料
型號(hào)： AD5522JSVDZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 50/64頁(yè)
文件大?。?/td> 0K
描述： IC PMU QUAD 16BIT DAC 80-TQFP
產(chǎn)品變化通告： Improve FI ac crosstalk
設(shè)計(jì)資源： Parametric Measurement Unit and Supporting Components for PAD Appls Using AD5522 and AD7685 (CN0104)
標(biāo)準(zhǔn)包裝： 1
類(lèi)型： 每引腳參數(shù)測(cè)量單元（PPMU）
應(yīng)用： 自動(dòng)測(cè)試設(shè)備
安裝類(lèi)型： 表面貼裝
封裝/外殼： 80-TQFP 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝： 80-TQFP（12x12）
包裝： 托盤(pán)
產(chǎn)品目錄頁(yè)面： 798 (CN2011-ZH PDF)
AD5522
Data Sheet
Rev. E | Page 54 of 64
READBACK OF SYSTEM CONTROL REGISTER
The system control register readback function is a 24-bit word. Mode and system control register data bits are shown in Table 31.
Table 31. System Control Register Readback
Bit
Bit Name
Description
23 (MSB)
MODE1
Set the MODE1 and MODE0 bits to 0 to address the system control register.
22
MODE0
System Control Register-Specific Readback Bits
21
CL3
Read back the status of the individual current clamp enable bits.
0 = clamp is disabled.
1 = clamp is enabled.
When reading back information about the status of the clamp enable function, the data that was most
recently written to the current clamp register from either the system control register or the PMU register
is available in the readback word.
20
CL2
19
CL1
18
CL0
17
CPOLH3
Read back information about the status of the comparator output enable bits.
1 = PMU comparator output is enabled.
0 = PMU comparator output is disabled.
When reading back information about the status of the comparator output enable function, the data
that was most recently written to the comparator status register from either the system control register
or the PMU register is available in the readback word.
16
CPOLH2
15
CPOLH1
14
CPOLH0
13
CPBIASEN
This readback bit indicates the status of the comparator enable function.
1 = comparator function is enabled.
0 = comparator function is disabled.
12
DUTGND/CH
DUTGND per channel enable.
1 = DUTGND per channel is enabled.
0 = individual guard inputs are available per channel.
11
GUARD ALM
These bits provide information about which of these alarm bits trigger the CGALM pin.
1 = guard/clamp alarm is enabled.
0 = guard/clamp alarm is disabled.
10
CLAMP ALM
9
INT10K
If this bit is high, the internal 10 kΩ resistor (SW7) is connected between FOHx and MEASVHx, and
between DUTGND and AGND. If this bit is low, SW7 is open.
8
Guard EN
Read back the status of the guard amplifiers. If this bit is high, the amplifiers are enabled.
7
GAIN1
Status of the selected MEASOUTx output range. See Table 10 and Table 11.
6
GAIN0
5
TMP ENABLE
Read back the status of the thermal shutdown function.
4
TMP1
Bits[5:3]
Action
3
TMP0
0XX
Thermal shutdown disabled.
100
Thermal shutdown enabled at junction temperature of 130°C (power-on default).
101
Thermal shutdown enabled at junction temperature of 120°C.
110
Thermal shutdown enabled at junction temperature of 110°C.
111
Thermal shutdown enabled at junction temperature of 100°C.
1XX
Thermal shutdown enabled.
2
Latched
This bit indicates the status of the open-drain alarm outputs, TMPALM and CGALM.
1 = open-drain alarm outputs are latched.
0 = open-drain alarm outputs are unlatched.
1
Unused
readback bits
Loads with 0s.
0 (LSB)
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