- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄4592 > AD5522JSVDZ (Analog Devices Inc)IC PMU QUAD 16BIT DAC 80-TQFP PDF資料下載
參數(shù)資料
| 型號： | AD5522JSVDZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 54/64頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PMU QUAD 16BIT DAC 80-TQFP |
| 產(chǎn)品變化通告： | Improve FI ac crosstalk |
| 設(shè)計資源： | Parametric Measurement Unit and Supporting Components for PAD Appls Using AD5522 and AD7685 (CN0104) |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 每引腳參數(shù)測量單元（PPMU） |
| 應(yīng)用： | 自動測試設(shè)備 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 80-TQFP 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 80-TQFP（12x12） |
| 包裝： | 托盤 |
| 產(chǎn)品目錄頁面： | 798 (CN2011-ZH PDF) |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁當(dāng)前第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁
AD5522
Data Sheet
Rev. E | Page 58 of 64
APPLICATIONS INFORMATION
POWER-ON DEFAULT
The power-on default for all DAC channels is that the contents
of each M register are set to full scale (0xFFFF), and the contents
of each C register are set to midscale (0x8000). The contents of
the DAC X1 registers at power-on are listed in Table 36.
The power-on default for the alarm status register is 0xFFFFF0,
and the power-on default for the comparator status register is
0x400000. The power-on default values of the PMU register and
the system control register are shown in Table 37 and Table 38.
SETTING UP THE DEVICE ON POWER-ON
On power-on, default conditions are recalled from the power-
on reset register to ensure that each PMU and DAC channel is
powered up in a known condition. To operate the device, the
user must follow these steps:
1. Configure the device by writing to the system control
register to set up different functions as required.
2. Calibrate the device to trim out errors, and load the
required calibration values to the gain (M) and offset (C)
registers. Load codes to each DAC input (X1) register.
When X1 values are loaded to the individual DACs, the
calibration engine calculates the appropriate X2 value and
stores it, ready for the PMU address to call it.
3. Load the required PMU channel with the required force
mode, current range, and so on. Loading the PMU channel
configures the switches around the force amplifier,
measure function, clamps, and comparators, and also acts
as a load signal for the DACs, loading the DAC register
with the appropriate stored X2 value.
4. Because the voltage and current ranges have individual
DAC registers associated with them, each PMU register
mode of operation calls a particular X2 register. Therefore,
only updates (that is, changes to the X1 register) to DACs
associated with the selected mode of operation are reflected
in the output of the PMU. If there is a change to the X1
value associated with a different PMU mode of operation,
this X1 value and its M and C coefficients are used to
calculate a corresponding X2 value, which is stored in the
correct X2 register, but this value is not loaded to the DAC.
Table 36. Default Contents of DAC Registers at Power-On
DAC Register
Default Value
Offset DAC
0xA492
FIN DAC
0x8000
CLL DAC
0x0000
CLH DAC
0xFFFF
CPL DAC
0x0000
CPH DAC
0xFFFF
Table 37. Power-On Default for System Control Register
Bit
Bit Name
Default Value
21 (MSB)
CL3
0
20
CL2
0
19
CL1
0
18
CL0
0
17
CPOLH3
0
16
CPOLH2
0
15
CPOLH1
0
14
CPOLH0
0
13
CPBIASEN
0
12
DUTGND/CH
0
11
Guard ALM
0
10
Clamp ALM
0
9
INT10K
0
8
Guard EN
0
7
GAIN1
0
6
GAIN0
0
5
TMP enable
1
4
TMP1
0
3
TMP0
0
2
Latched
0
1
Unused data bit
0
0 (LSB)
Unused data bit
0
Table 38. Power-On Default for PMU Register
Bit
Bit Name
Default Value
21 (MSB)
CH EN
0
20
FORCE1
0
19
FORCE0
0
18
Reserved
0
17
C2
0
16
C1
1
15
C0
1
14
MEAS1
1
13
MEAS0
1
12
FIN
0
11
SF0
0
10
SS0
0
9
CL
0
8
CPOLH
0
7
Compare V/I
0
6
LTMPALM
1
5
TMPALM
1
4
Unused data bit
0
3
Unused data bit
0
2
Unused data bit
0
1
Unused data bit
0
0 (LSB)
Unused data bit
0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ESC65DRTI | CONN EDGECARD 130PS DIP .100 SLD |
| AMC30DRTS | CONN EDGECARD 60POS .100 DIP SLD |
| AMC30DRES | CONN EDGECARD 60POS .100 EYELET |
| ASC31DRAS | CONN EDGECARD 62POS .100 R/A DIP |
| RGM40DTMT | CONN EDGECARD 80POS R/A .156 SLD |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD5522JSVUZ | 功能描述:IC PMU QUAD 16BIT DAC 80-TQFP RoHS:是 類別:集成電路 (IC) >> 專用 IC 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類型:調(diào)幀器 應(yīng)用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應(yīng)商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝 |
| AD5522JSVUZ-RL | 功能描述:Per-Pin Parametric Measurement Unit (PPMU) IC Automatic Test Equipment 80-TQFP-EP (12x12) 制造商:analog devices inc. 系列:- 包裝:帶卷（TR） 零件狀態(tài):有效 類型:每引腳參數(shù)測量單元（PPMU） 應(yīng)用:自動測試設(shè)備 安裝類型:表面貼裝 封裝/外殼:80-TQFP 裸露焊盤 供應(yīng)商器件封裝:80-TQFP-EP（12x12） 標(biāo)準(zhǔn)包裝:1,000 |
| AD5523JCPZ | 制造商:AD 制造商全稱:Analog Devices 功能描述:Quad Parametric Measurement Unit With Integrated 16-Bit Level Setting DACs |
| AD5530 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Serial Input, Voltage Output 12-/14-Bit DACs |
| AD5530_07 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Serial Input, Voltage Output 12-/14-Bit Digital-to-Analog Converters |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。