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參數(shù)資料
| 型號： | AD5522JSVDZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 51/64頁 |
| 文件大小： | 0K |
| 描述： | IC PMU QUAD 16BIT DAC 80-TQFP |
| 產(chǎn)品變化通告： | Improve FI ac crosstalk |
| 設(shè)計(jì)資源： | Parametric Measurement Unit and Supporting Components for PAD Appls Using AD5522 and AD7685 (CN0104) |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 每引腳參數(shù)測量單元（PPMU） |
| 應(yīng)用： | 自動測試設(shè)備 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 80-TQFP 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 80-TQFP（12x12） |
| 包裝： | 托盤 |
| 產(chǎn)品目錄頁面： | 798 (CN2011-ZH PDF) |
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Data Sheet
AD5522
Rev. E | Page 55 of 64
READBACK OF PMU REGISTER
The PMU register readback function is a 24-bit word that includes the mode and PMU data bits. Only one PMU register can be read back
at any one time.
Table 32. PMU Register Readback
Bit
Bit Name
Description
23 (MSB)
MODE1
Set the MODE1 and MODE0 bits to 0 to access the selected PMU register.
22
MODE0
PMU Register-Specific Bits
21
CH EN
Channel enable. If this bit is high, the selected channel is enabled; if this bit is low, the channel is disabled.
20
FORCE1
These bits indicate which force mode the selected channel is in.
00 = FV and current clamp (if clamp is enabled).
01 = FI and voltage clamp (if clamp is enabled).
10 = high-Z FOHx voltage.
11 = high-Z FOHx current.
19
FORCE0
18
Reserved
0.
17
C2
These three bits indicate which forced or measured current range is set for the selected channel (see
16
C1
15
C0
14
MEAS1
These bits indicate which measure mode is selected: voltage, current, temperature sensor, or high-Z.
00 = MEASOUTx is connected to ISENSE.
01 = MEASOUTx is connected to VSENSE.
10 = MEASOUTx is connected to the temperature sensor.
11 = MEASOUTx is high-Z (SW12 open).
13
MEAS0
12
FIN
This bit shows the status of the force input (FIN) amplifier.
0 = input of the force amplifier switched to GND.
1 = input of the force amplifier connected to the FIN DAC output.
11
SF0
The system force and sense lines can be connected to any of the four PMU channels. These bits indicate
whether the system force and sense lines are switched in (see Table 26).
10
SS0
9
CL
Read back the status of the individual current clamp enable bits.
1 = clamp is enabled on this channel.
0 = clamp is disabled on this channel.
When reading back information about the status of the current clamp enable function, the data that
was most recently written to the current clamp register from either the system control register or the
PMU register is available in the readback word.
8
CPOLH
Read back the status of the comparator output enable bit.
1 = PMU comparator output is enabled.
0 = PMU comparator output is disabled.
When reading back information about the status of the comparator output enable function, the data
that was most recently written to the comparator register from either the system control register or the
PMU register is available in the readback word.
7
Compare V/I
1 = compare voltage function is enabled on the selected channel.
0 = compare current function is enabled on the selected channel.
6
LTMPALM
TMPALM corresponds to the open-drain TMPALM output pin that flags a temperature event exceeding
the default or user programmed level. The temperature alarm is a per-device alarm; the latched
(LTMPALM) and unlatched (TMPALM) bits indicate whether a temperature event occurred and whether
the alarm still exists (that is, whether the junction temperature still exceeds the programmed alarm
level). To reset an alarm event, the user must write a 1 to the clear bit (Bit 6) in the PMU register.
5
TMPALM
4 to 0 (LSB)
Unused
readback bits
Loads with 0s.
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