參數(shù)資料
型號(hào)： AM79C970
廠商： Advanced Micro Devices, Inc.
英文描述： PCnetTM-PCI Single-Chip Ethernet Controller for PCI Local Bus
中文描述： PCnetTM - PCI單芯片以太網(wǎng)控制器的PCI總線
文件頁數(shù)： 119/168頁
文件大?。?/td> 943K
代理商： AM79C970
AMD
P R E L I M I N A R Y
1-986
Am79C970
12–5
RES
Reserved locations. Written as
ZERO, read as undefined.
EEPROM port enable. When this
bit is set to a one, it causes the
values of ECS, ESK and EDI to
be driven onto the EECS, EESK
and EEDI pins, respectively. If
EEN=0 and no EEPROM read
function is currently active, then
EECS will be driven LOW. When
EEN=0 and no EEPROM read
function is currently active, EESK
and EEDI pins will be driven by
the LED registers BCR5 and
BCR4, respectively.
EEN is set to ZERO by H_RE-
SET and is unaffected by the
S_RESET or STOP bit.
Reserved location. Written as
ZERO and read as undefined.
EEPROM Chip Select. This bit is
used to control the value of the
EECS pin of the Microwire inter-
face when the EEN bit is set to
ONE and the PREAD bit is set to
ZERO. If EEN = 1 and PREAD =
0 and ECS is set to a ONE, then
the EECS pin will be forced to a
HIGH level at the rising edge of
the next CLK following bit pro-
gramming. If EEN = 1 and
PREAD = 0 and ECS is set to a
ZERO, then the EECS pin will be
forced to a LOW level at the rising
4
EEN
3
RES
2
ECS
edge of the next CLK following bit
programming. ECS has no effect
on the output value of the EECS
pin unless the PREAD bit is set to
ZERO and the EEN bit is set to
ONE.
ECS is set to ZERO by H_RE-
SET and is not affected by
S_RESET or STOP.
EEPROM Serial Clock. This bit
and the EDI/EDO bit are used to
control host access to the
EEPROM. Values programmed
to this bit are placed onto the
EESK pin at the rising edge of the
next CLK following bit program-
ming, except when the PREAD
bit is set to ONE or the EEN bit is
set to ZERO. If both the ESK bit
and the EDI/EDO bit values are
changed during one BCR19 write
operation, while EEN = 1, then
setup and hold times of the EEDI
pin value with respect to the
EESK signal edge are not guar-
anteed.
ESK has no effect on the EESK
pin unless the PREAD bit is set to
ZERO and the EEN bit is set to
ONE.
ESK is reset to ONE by H_RE-
SET and is not affected by
S_RESET or STOP.
1
ESK
Table 11. EEPROM Port Enable
PREAD or
Auto Read
in Progress
X
1
0
RST
Pin
Low
High
High
EEN
X
X
1
EECS
0
Active
From ECS
Bit of BCR19
0
EESK
Z
Active
EEDI
Z
Active
From ESK Bit
of BCR19
LED1
From EDI Bit
of BCR19
LNKST
High
0
0
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參數(shù)描述
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