參數(shù)資料
型號(hào)： AM79C970
廠商： Advanced Micro Devices, Inc.
英文描述： PCnetTM-PCI Single-Chip Ethernet Controller for PCI Local Bus
中文描述： PCnetTM - PCI單芯片以太網(wǎng)控制器的PCI總線
文件頁(yè)數(shù)： 98/168頁(yè)
文件大?。?/td> 943K
代理商： AM79C970
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P R E L I M I N A R Y
AMD
1-965
Am79C970
CSR32: Next Transmit Descriptor Address Lower
Bit
Name
Description
31–16
RES
Reserved locations. Written as
ZEROs and read as undefined.
Contains the lower 16 bits of the
next TDRE address pointer.
Read/write accessible only when
STOP bit is set. These bits are
unaffected
by
S_RESET or STOP.
15–0
NXDAL
H_RESET,
CSR33: Next Transmit Descriptor Address Upper
Bit
Name
Description
31–16
RES
Reserved locations. Written as
ZEROs and read as undefined.
Contains the upper 16 bits of the
next TDRE address pointer.
Read/write accessible only when
STOP bit is set. These bits are
unaffected
by
S_RESET or STOP.
15–0 NXDAU
H_RESET,
CSR34: Current Transmit Descriptor
Address Lower
Bit
Name
Description
31–16
RES
Reserved locations. Written as
ZEROs and read as undefined.
Contains the lower 16 bits of the
current TDRE address pointer.
Read/write accessible only when
STOP bit is set. These bits are
unaffected
by
S_RESET or STOP.
15–0
CXDAL
H_RESET,
CSR35: Current Transmit Descriptor
Address Upper
Bit
Name
Description
31–16
RES
Reserved locations. Written as
ZEROs and read as undefined.
Contains the upper 16 bits of the
current TDRE address pointer.
Read/write accessible only when
STOP bit is set. These bits are
unaffected
by
S_RESET or STOP.
15–0 CXDAU
H_RESET,
CSR36: Next Next Receive Descriptor Address
Lower
Bit
Name
Description
31–16
RES
Reserved locations. Written as
ZEROs and read as undefined.
Contains the lower 16 bits of the
next next receive descriptor ad-
dress pointer.
Read/write accessible only when
STOP bit is set. These bits are
unaffected
by
S_RESET or STOP.
15–0 NNRDAL
H_RESET,
CSR37: Next Next Receive Descriptor Address
Upper
Bit
Name
Description
31–16
RES
Reserved locations. Written as
ZEROs and read as undefined.
Contains the upper 16 bits of the
next next receive descriptor ad-
dress pointer.
Read/write accessible only when
STOP bit is set. These bits are
unaffected
by
S_RESET or STOP.
15–0 NNRDAU
H_RESET,
CSR38: Next Next Transmit Descriptor Address
Lower
Bit
Name
Description
31–16
RES
Reserved locations. Written as
ZEROs and read as undefined.
Contains the lower 16 bits of the
next next transmit descriptor ad-
dress pointer.
Read/write accessible only when
STOP bit is set. These bits are
unaffected
by
S_RESET or STOP.
15–0 NNXDAL
H_RESET,
CSR39: Next Next Transmit Descriptor Address
Upper
Bit
Name
Description
31–16
RES
Reserved locations. Written as
ZEROs and read as undefined.
相關(guān)PDF資料
PDF描述
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AM79C971 PCnet⑩-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM79C970A 制造商:AMD 制造商全稱(chēng):Advanced Micro Devices 功能描述:PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
AM79C970AKC 制造商:AMD 制造商全稱(chēng):Advanced Micro Devices 功能描述:PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
AM79C970AKC\\W 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Advanced Micro Devices 功能描述:
AM79C970AKC\W 制造商:Rochester Electronics LLC 功能描述:- Bulk
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