參數(shù)資料
型號: DS33ZH11+
廠商: Maxim Integrated Products
文件頁數(shù): 128/172頁
文件大?。?/td> 0K
描述: IC MAPPER ETHERNET 100CSBGA
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 7
應(yīng)用: 數(shù)據(jù)傳輸
接口: 串行
電源電壓: 1.8V,2.5V,3.3V
封裝/外殼: 100-LFBGA,CSPBGA
供應(yīng)商設(shè)備封裝: 100-CSBGA(10x10)
包裝: 托盤
安裝類型: 表面貼裝
DS33Z11 Ethernet Mapper
59 of 172
The X86 received frame is aborted if:
If 7D,7E is detected. This is an abort packet sequence in X.86
Invalid FCS is detected
The received frame has less than 6 octets
Control, SAPI and address field are mismatched to the programmed value
Octet 7D and octet other than 5D, 5E, 7E, or DD is detected
For the transmitter if X.86 is enabled the sequence of processing is as follows:
Construct frame including start flag SAPI, Control and MAC frame
Calculate FCS
Perform transparency processing - 7E is translated to 7D5E, 7D is translated to 7D5D
Append the end flag(7E)
Scramble the sequence X
43+1
Note that the Serial transmit and receive registers apply to the X.86 implementations with specific exceptions. The
exceptions are outlined in the Serial Interface transmit and receive register sections.
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