參數(shù)資料
型號: DS33ZH11+
廠商: Maxim Integrated Products
文件頁數(shù): 3/172頁
文件大小: 0K
描述: IC MAPPER ETHERNET 100CSBGA
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 7
應(yīng)用: 數(shù)據(jù)傳輸
接口: 串行
電源電壓: 1.8V,2.5V,3.3V
封裝/外殼: 100-LFBGA,CSPBGA
供應(yīng)商設(shè)備封裝: 100-CSBGA(10x10)
包裝: 托盤
安裝類型: 表面貼裝
DS33Z11 Ethernet Mapper
100 of 172
Register Name:
LI.TRX86SAPIL
Register Description:
Transmit Receive X.86 SAPIL
Register Address:
0DCh
Bit #
7
6
5
4
3
2
1
0
Name
TRSAPIL7
TRSAPIL6
TRSAPIL5
TRSAPIL4
TRSAPIL3
TRSAPIL2
TRSAPIL1
TRSAPIL0
Default
0
1
Bits 0 – 7: X86 Transmit Receive Control (TRSAPIL0-7) This is the address field for the X.86 transmitter and
expected value for the receiver. The register is reset to 0x01
Register Name:
LI.CIR
Register Description:
Committed Information Rate
Register Address:
0DDh
Bit #
7
6
5
4
3
2
1
0
Name
CIRE
CIR6
CIR5
CIR4
CIR3
CIR2
CIR1
CIR0
Default
0
1
Bit 7: Committed Information Rate Enable (CIRE) Set this bit to 1 to enable the Committed Information Rate
Controller feature.
Bits 0 – 6: Committed Information Rate (CIR0-6) These bits provide the value for the committed information
rate. The value is multiplied by 500 kbps to get the CIR value. The user must ensure that the CIR value is less
than or equal to the maximum Serial Interface transmit rate. The valid range is from 1 to 104. Any values outside
this range will result in unpredictable behavior. Note that a value of 104 translates to a 52 Mbps line rate. Hence if
the CIR is above the line rate, the rate is not restricted by the CIR. For instance, if using a T1 line and the CIR is
programmed with a value of 104, it has no effect in restricting the rate.
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