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| 型號： | FUSION878A |
| 廠商： | CONEXANT SYSTEMS |
| 元件分類： | 顏色信號轉(zhuǎn)換 |
| 英文描述： | COLOR SIGNAL DECODER, PQFP128 |
| 封裝： | PLASTIC, QFP-128 |
| 文件頁數(shù)： | 119/180頁 |
| 文件大小： | 2067K |
| 代理商： | FUSION878A |
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Fusion 878A
2.0 Functional Description
PCI Video Decoder
2.4 Video Scaling, Cropping, and Temporal Decimation
100600B
Conexant
2-19
The Vertical Delay
Register (VDELAY)
For video decoding, VDELAY is programmed with the number of half lines
between the end of the serration pulses and the first line to be displayed or
captured.
For GPIO SPIOUT, VDELAY is programmed with the number of half lines
between the rising edge of VRESET and the rising edge of VACTIVE.
The register value is programmed with respect to the unscaled input signal.
VDELAY must be programmed to an even number to avoid apparent field
reversal.
The Vertical Active
Register (VACTIVE)
For video decoding and GPIO SPIOUT, VACTIVE is programmed with the
number of lines in one frame for the source video.
NOTE:
It is important to note the difference between the implementation of the
horizontal registers (HSCALE, HDELAY, and HACTIVE) and the vertical
registers (VSCALE, VDELAY, and VACTIVE). Horizontally, HDELAY
and HACTIVE are programmed with respect to the scaled pixels defined
by HSCALE. Vertically, VDELAY and VACTIVE are programmed with
respect to the number of lines before scaling (before VSCALE is applied).
For GPIO SPIIN, the registers HDELAY, HACTIVE, VDELAY, and
VACTIVE are not used.
2.4.3 Temporal Decimation
Temporal decimation provides a solution for video synchronization during
periods when full frame rate cannot be supported due to bandwidth and system
restrictions.
For example, when capturing live video for storage, system limitations such as
hard disk transfer rates or system bus bandwidth may limit the frame capture rate.
If these restrictions limit the frame rate to 15 frames per second, the Fusion 878As
time scaling operation enables the system to capture every other frame instead of
allowing hard disk timing restrictions to dictate which frame to capture. This
maintains an even distribution of captured frames and alleviates the “jerky” effect
caused by systems that simply burst in data when the bandwidth becomes
available.
The Fusion 878A provides temporal decimation on either a field or frame
basis. The temporal decimation register (TDEC) is loaded with a value from 1 to
60 (NTSC) or 1 to 50 (PAL/SECAM). This value is the number of fields or
frames skipped by the chip during a sequence of 60 for NTSC or 50 for
PAL/SECAM. Skipped fields and frames are considered inactive, which is
indicated by the ACTIVE pin remaining low.
Examples:
TDEC = 0x02 Decimation is performed by frames. Two frames are
skipped per 60 frames of video, assuming NTSC
decoding.
Frames 1–29 are output normally, then ACTIVE
remains low for one frame. Frames 31–59 are then
output followed by another frame of inactive video.
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