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參數(shù)資料
| 型號(hào)： | FUSION878A |
| 廠(chǎng)商： | CONEXANT SYSTEMS |
| 元件分類(lèi)： | 顏色信號(hào)轉(zhuǎn)換 |
| 英文描述： | COLOR SIGNAL DECODER, PQFP128 |
| 封裝： | PLASTIC, QFP-128 |
| 文件頁(yè)數(shù)： | 17/180頁(yè) |
| 文件大小： | 2067K |
| 代理商： | FUSION878A |
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Fusion 878A
3.0 Electrical Interfaces
PCI Video Decoder
3.7 JTAG Interface
100600B
Conexant
3-29
3.7 JTAG Interface
3.7.1 Need for Functional Verification
As the complexity of imaging chips increases, the need to easily access individual
chips for functional verification is becoming vital. The Fusion 878A has
incorporated special circuitry that allows it to be accessed in full compliance with
standards set by the Joint Test Action Group (JTAG). Conforming to IEEE Std
P1149.1 “Standard Test Access Port and Boundary Scan Architecture,” the Fusion
878A has dedicated pins that are used for testability purposes only.
3.7.2 JTAG Approach to Testability
JTAG’s approach to testability uses boundary scan cells placed at each digital pin
and digital interface. In the Fusion 878A, a digital interface is the boundary
between an analog block and a digital block. All cells are interconnected into a
boundary scan register that applies or captures test data used for functional
verification of the integrated circuit. JTAG is particularly useful for board testers
using functional testing methods.
JTAG consists of five dedicated pins comprising the Test Access Port (TAP):
Test Mode Select (TMS)
Test Clock (TCK)
Test Data Input (TDI)
Test Data Out (TDO)
Test Reset (TRST)
The TRST pin will reset the JTAG controller when pulled low at any time.
Verification of the integrated circuit and its connection to other modules on the
printed circuit board can be achieved through these five TAP pins.
With boundary scan cells at each digital interface and pin, the Fusion 878A
has the capability to apply and capture the respective logic levels. Since all of the
digital pins are interconnected as a long shift register, the TAP logic has access
and control of all the necessary pins to verify functionality. The TAP controller
can shift in any number of test vectors through the TDI input and apply them to
the internal circuitry. The output result is scanned out on the TDO pin and
externally checked. While isolating the Fusion 878A from other components on
the board, the user has easy access to all digital pins and digital interfaces through
the TAP and can perform complete functionality tests without using expensive
bed-of-nails testers.
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