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| 型號： | ISP1564ET,551 |
| 廠商： | ST-ERICSSON |
| 元件分類： | 總線控制器 |
| 英文描述： | PCI BUS CONTROLLER, PBGA100 |
| 封裝： | 9 X 9 MM, 0.70 MM HEIGHT, 0.80 MM PITCH, PLASTIC, SOT926-1, TFBGA-100 |
| 文件頁數(shù)： | 21/99頁 |
| 文件大小： | 493K |
| 代理商： | ISP1564ET,551 |
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ISP1564_2
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 13 November 2008
27 of 98
NXP Semiconductors
ISP1564
HS USB PCI host controller
8.2.3.4
PMCSR register
The Power Management Control/Status (PMCSR) register is a 2-byte register used to
manage the power management state of the PCI function, as well as to allow and monitor
Power Management Events (PMEs). The bit allocation of the register is given in Table 36.
[1]
Sticky bit, if the function supports PME# from D3cold, then X is indeterminate at the time of initial operating system boot; X is 0 if the
function does not support PME# from D3cold.
[2]
The reserved bits must always be written with the reset value.
Table 36.
PMCSR - Power Management Control/Status register bit allocation
Address: Value read from address 34h + 4h
Bit
15
14
13
12
11
10
9
8
Symbol
PMES
DS[1:0]
D_S[3:0]
PMEE
Reset
X[1]
000000
X[1]
Access
R/W
R
R/W
Bit
7
6
5
4
3
2
1
0
Symbol
reserved[2]
PS[1:0]
Reset
00000000
Access
R/W
Table 37.
PMCSR - Power Management Control/Status register bit description
Address: Value read from address 34h + 4h
Bit
Symbol
Description
15
PMES
PME Status: This bit is set when the function normally asserts the PME# signal independent of
the state of the PMEE bit. Writing logic 1 to this bit clears it and causes the function to stop
asserting PME#, if enabled. Writing logic 0 has no effect. This bit defaults to logic 0, if the function
does not support the PME# generation from D3cold. If the function supports the PME# generation
from D3cold, then this bit is sticky and must be explicitly cleared by the operating system each time
the operating system is initially loaded.
14 to 13
DS[1:0]
Data Scale: This two-bit read-only eld indicates the scaling factor when interpreting the value of
the Data register. The value and meaning of this eld vary, depending on which data value is
selected by the D_S eld. This eld is a required component of the Data register (offset 7) and
must be implemented, if the Data register is implemented. If the Data register is not implemented,
this eld must return 00b when PMCSR is read.
12 to 9
D_S
[3:0]
Data Select: This four-bit eld selects the data that is reported through the Data register and the
D_S eld. This eld is a required component of the Data register (offset 7) and must be
implemented, if the Data register is implemented. If the Data register is not implemented, this eld
must return 00b when PMCSR is read.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISP1564ETGA | 功能描述:IC USB PCI HOST CTRLR 100-TFBGA RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
| ISP1564ET-S | 功能描述:外圍驅(qū)動器與原件 - PCI USB 2.0 2PORT PCI HOST CONTROL RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| ISP1564ET-T | 功能描述:外圍驅(qū)動器與原件 - PCI USB 2.0 2PORT PCI HOST CONTROL RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| ISP1564ETUM | 功能描述:IC USB PCI HOST CTRLR 100-TFBGA RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
| ISP1564HL | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Hi-Speed USB PCI host controller |
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