參數(shù)資料
型號: ISP1564ET,551
廠商: ST-ERICSSON
元件分類: 總線控制器
英文描述: PCI BUS CONTROLLER, PBGA100
封裝: 9 X 9 MM, 0.70 MM HEIGHT, 0.80 MM PITCH, PLASTIC, SOT926-1, TFBGA-100
文件頁數(shù): 69/99頁
文件大?。?/td> 493K
代理商: ISP1564ET,551
ISP1564_2
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 13 November 2008
70 of 98
NXP Semiconductors
ISP1564
HS USB PCI host controller
[1]
The reserved bits must always be written with the reset value.
11.3.5 PERIODICLISTBASE register
The Periodic Frame List Base Address (PERIODICLISTBASE) register contains the
beginning address of the periodic frame list in the system memory. If the host controller is
in 64-bit mode, as indicated by logic 1 in 64AC (bit 0 of the HCCPARAMS register), the
most signicant 32 bits of every control data structure address comes from the
CTRLDSSEGMENT register. For details on the CTRLDSSEGMENT register, refer to
Enhanced Host Controller Interface Specication for Universal Serial Bus Rev. 1.0. The
system software loads this register before starting the schedule execution by the host
controller. The memory structure referenced by this physical memory pointer is assumed
as 4 kB aligned. The contents of this register are combined with the FRINDEX register to
enable the host controller to step through the periodic frame list in sequence.
The bit allocation is given in Table 108.
Bit
23
22
21
20
19
18
17
16
Symbol
reserved[1]
Reset
00000000
Access
R/W
Bit
15
14
13
12
11
10
9
8
Symbol
reserved[1]
FRINDEX[13:8]
Reset
00000000
Access
R/W
Bit
7
6
5
4
3
2
1
0
Symbol
FRINDEX[7:0]
Reset
00000000
Access
R/W
Table 106. FRINDEX - Frame Index register bit description
Address: Content of the base address register + 2Ch
Bit
Symbol
Description
31 to 14
reserved
-
13 to 0
FRINDEX [13:0]
Frame Index: Bits in this register are used for the frame number in the SOF packet and as
the index into the frame list. The value in this register increments at the end of each time
frame. For example, microframe. The bits used for the frame number in the SOF token are
taken from bits 13 to 3 of this register. Bits N to 3 are used for the frame list current index.
This means that each location of the frame list is accessed eight times, frames or
microframes, before moving to the next index.
Table 107 illustrates N based on the value of FLS[1:0] (bits 3 to 2 in the USBCMD register).
Table 107. N based value of FLS[1:0]
FLS[1:0]
Number elements
N
00b
1024
12
01b
512
11
10b
256
10
11b
reserved
-
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