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ISP1564_2
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 13 November 2008
59 of 98
NXP Semiconductors
ISP1564
HS USB PCI host controller
16
CSC
Connect Status Change: This bit is set whenever a connect or disconnect event occurs. The HCD
can write logic 1 to clear this bit. Writing logic 0 has no effect. If CCS (Current Connect Status) is
cleared when a Set Port Reset, Set Port Enable or Set Port Suspend write occurs, this bit is set to
force the driver to re-evaluate the connection status because these writes must not occur if the port
is disconnected.
0 — No change in CCS.
1 — Change in CCS.
Remark: If the DeviceRemovable[NDP] bit is set, this bit is set only after a root hub reset to inform
the system that the device is attached.
15 to 10
reserved
-
9
LSDA
On read Low-Speed Device Attached: This bit indicates the speed of the device attached to this
port. When set, a low-speed device is attached to this port. When cleared, a full-speed device is
attached to this port. This eld is valid only when CCS is set.
0 — Port is not suspended.
1 — Port is suspended.
On write Clear Port Power: The HCD can clear the PPS (Port Power Status) bit by writing logic 1 to
this bit. Writing logic 0 has no effect.
8
PPS
On read Port Power Status: This bit reects the port power status, regardless of the type of power
switching implemented. This bit is cleared if an overcurrent condition is detected. The HCD can set
this bit by writing Set Port Power or Set Global Power. The HCD can clear this bit by writing Clear
Port Power or Clear Global Power. Power Switching Mode and PortPowerControlMask[NDP]
determine which power control switches are enabled. In Global Switching mode (Power Switching
Mode = 0), only Set/Clear Global Power controls this bit. In the per-port power switching (Power
Switching Mode = 1), if the PortPowerControlMask[NDP] bit for the port is set, only Set/Clear Port
Power commands are enabled. If the mask is not set, only Set/Clear Global Power commands are
enabled.
When port power is disabled, bits CCS (Current Connect Status), PES (Port Enable Status), PSS
(Port Suspend Status) and PRS (Port Reset Status) must be reset.
0 — Port power is off.
1 — Port power is on.
On write Set Port Power: The HCD can write logic 1 to set the PPS (Port Power Status) bit. Writing
logic 0 has no effect.
Remark: This bit always reads logic 1 if power switching is not supported.
7 to 5
reserved
-
4
PRS
On read Port Reset Status: When this bit is set by a write to Set Port Reset, port reset signaling is
asserted. When reset is completed and PRSC is set, this bit is cleared.
0 — Port reset signal is inactive.
1 — Port reset signal is active.
On write Set Port Reset: The HCD can set the port reset signaling by writing logic 1 to this bit.
Writing logic 0 has no effect. If CCS is cleared, this write does not set PRS (Port Reset Status) but
instead sets CCS. This informs the driver that it attempted to reset a disconnected port.
Table 92.
HcRhPortStatus[2:1] - Host Controller Root Hub Port Status[2:1] register bit description …continued
Address: Content of the base address register + 54h
Bit
Symbol
Description