參數(shù)資料
型號(hào)： ISP1564ET,551
廠商： ST-ERICSSON
元件分類： 總線控制器
英文描述： PCI BUS CONTROLLER, PBGA100
封裝： 9 X 9 MM, 0.70 MM HEIGHT, 0.80 MM PITCH, PLASTIC, SOT926-1, TFBGA-100
文件頁數(shù)： 50/99頁
文件大小： 493K
代理商： ISP1564ET,551
ISP1564_2
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 13 November 2008
53 of 98
NXP Semiconductors
ISP1564
HS USB PCI host controller
11.1.18 HcLSThreshold register
This register contains an 11-bit value used by the host controller to determine whether to
commit to the transfer of a maximum of 8-byte low-speed packet before EOF. Neither the
host controller nor the HCD can change this value. For bit allocation, see Table 83.
[1]
The reserved bits must always be written with the reset value.
11.1.19 HcRhDescriptorA register
This register is the rst of two registers describing the characteristics of the root hub.
Reset values are implementation-specic.
Table 82.
HcPeriodicStart - Host Controller Periodic Start register bit description
Address: Content of the base address register + 40h
Bit
Symbol
Description
31 to 14
reserved
-
13 to 0
P_S[13:0]
Periodic Start: After a hardware reset, this eld is cleared. It is then set by the HCD during the
host controller initialization. The value is roughly calculated as 10 % of HcFmInterval. A typical
value is 3E67h. When HcFmRemaining reaches the value specied, processing of the periodic
lists have priority over control or bulk processing. The host controller, therefore, starts processing
the interrupt list after completing the current control or bulk transaction that is in progress.
Table 83.
HcLSThreshold - Host Controller Low-Speed Threshold register bit allocation
Address: Content of the base address register + 44h
Bit
31
30
29
28
27
26
25
24
Symbol
reserved[1]
Reset
00000000
Access
R/W
Bit
23
22
21
20
19
18
17
16
Symbol
reserved[1]
Reset
00000000
Access
R/W
Bit
15
14
13
12
11
10
9
8
Symbol
reserved[1]
LST[11:8]
Reset
00000110
Access
R/W
Bit
7
6
5
4
3
2
1
0
Symbol
LST[7:0]
Reset
00101000
Access
R/W
Table 84.
HcLSThreshold - Host Controller Low-Speed Threshold register bit description
Address: Content of the base address register + 44h
Bit
Symbol
Description
31 to 12
reserved
-
11 to 0
LST[11:0]
LS Threshold: This eld contains a value that is compared to the FR[13:0] eld, before initiating
a low-speed transaction. The transaction is started only if FR
≥ this eld. The value is calculated
by the HCD, considering the transmission and set-up overhead.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISP1564ETGA 功能描述:IC USB PCI HOST CTRLR 100-TFBGA RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2
ISP1564ET-S 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI USB 2.0 2PORT PCI HOST CONTROL RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
ISP1564ET-T 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI USB 2.0 2PORT PCI HOST CONTROL RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
ISP1564ETUM 功能描述:IC USB PCI HOST CTRLR 100-TFBGA RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2
ISP1564HL 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Hi-Speed USB PCI host controller
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