參數(shù)資料
型號(hào)： K4B4G0846B-MCF80
元件分類(lèi)： DRAM
英文描述： 512M X 8 DDR DRAM, 0.3 ns, PBGA78
封裝： HALOGEN FREE AND ROHS COMPLIANT, FBGA-78
文件頁(yè)數(shù)： 34/59頁(yè)
文件大小： 1079K
代理商： K4B4G0846B-MCF80
Page 4 of 59
Rev. 1.0 March 2009
DDP 4Gb DDR3 SDRAM
K4B4G0446B
K4B4G0846B
9.9 ODT Timing Definitions
.............................................................................................................. 25
9.9.1 Test Load for ODT Timings
................................................................................................. 25
9.9.2 ODT Timing Definition
........................................................................................................ 25
10.0 IDD Specification Parameters and Test Conditions ............................................................. 28
10.1 IDD Measurement Conditions
.................................................................................................... 28
10.2 IDD Specifications definition
..................................................................................................... 30
11.0 DDP 4Gb DDR3 SDRAM B-die IDD Spec Table ..................................................................... 37
12.0 Input/Output Capacitance ....................................................................................................... 38
13.0 Electrical Characteristics and AC timing for DDR3-800 to DDR3-1600 .............................. 39
13.1 Clock specification
............................................................................................................. 39
13.1.1 Definition for tCK (avg)
..................................................................................................... 39
13.1.2 Definition for tCK (abs)
..................................................................................................... 39
13.1.3 Definition for tCH(avg) and tCL(avg)
................................................................................... 39
13.1.4 Definition for note for tJIT(per), tJIT(per,Ick)
........................................................................ 39
13.1.5 Definition for tJIT(cc), tJIT(cc,Ick)
...................................................................................... 39
13.1.6 Definition for tERR(nper)
................................................................................................... 39
13.2 Refresh Parameters by Device Density
....................................................................................... 40
13.3 Speed Bins and CL, tRCD, tRP, tRC and tRAS for corresponding Bin
............................................. 40
13.3.1 Speed Bin Table Notes...........................................................................................................................
43
14.0 Timing Parameters by Speed Grade ...................................................................................... 44
14.1 Jitter Notes
............................................................................................................................. 47
14.2 Timing Parameter Notes
........................................................................................................... 48
14.3 Address / Command Setup, Hold and Derating:
........................................................................... 49
14.4 Data Setup, Hold and Slew Rate Derating:
.................................................................................. 55
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
K4B4G0846B-MCH9 制造商:SAMSUNG 制造商全稱(chēng):Samsung semiconductor 功能描述:DDP 4Gb B-die DDR3 SDRAM Specification
K4B4G0846D-BCK0000 制造商:Samsung Semiconductor 功能描述:
K4B4G1646B-HCH9000 制造商:Samsung Semiconductor 功能描述:
K4B4G1646B-HCK000 制造商:Samsung Semiconductor 功能描述:
K4B4G1646B-HCK0000 制造商:Samsung 功能描述:DDR SGRAM X16 TSOP2 - Trays
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