參數(shù)資料
型號: LPC3250FET296,551
廠商: NXP Semiconductors
文件頁數(shù): 2/57頁
文件大?。?/td> 0K
描述: IC ARM9 MCU 256K 296-TFBGA
特色產(chǎn)品: LPC32x0 ARM926EJ-S Processor
標準包裝: 126
系列: LPC3200
核心處理器: ARM9
芯體尺寸: 16/32-位
速度: 266MHz
連通性: EBI/EMI,以太網(wǎng),I²C,IrDA,Microwire,SPI,SSI,SSP,UART/USART,USB OTG
外圍設備: DMA,I²S,LCD,電機控制 PWM,PWM,WDT
輸入/輸出數(shù): 51
程序存儲器類型: ROMless
RAM 容量: 256K x 8
電壓 - 電源 (Vcc/Vdd): 0.9 V ~ 3.6 V
數(shù)據(jù)轉換器: A/D 3x10b
振蕩器型: 內部
工作溫度: -40°C ~ 85°C
封裝/外殼: 296-TFBGA
包裝: 托盤
配用: 568-4743-ND - KIT LCD TOUCH 5.7" FOR LPC3250
568-4742-ND - MODULE DIMM LPC2478 ARM7
622-1030-ND - KIT LCD TOUCH 5.7" FOR LPC3250
其它名稱: 568-4533
935287084551
LPC3220_30_40_50
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 20 October 2011
10 of 79
NXP Semiconductors
LPC3220/30/40/50
16/32-bit ARM microcontrollers
6.2 Pin description
Table 4.
Pin description
Symbol
Pin
Power supply
domain
Type
Description
ADIN0/TS_YM
U15
VDD_AD
analog in
ADC input 0/touch screen Y minus
ADIN1/TS_XM
T14
VDD_AD
analog in
ADC input 0/touch screen X minus
ADIN2/TS_AUX_IN
V16
VDD_AD
analog in
ADC input 2/touch screen AUX input
DBGEN
G14
VDD_IOD
I: PD
Device test input
LOW = JTAG in-circuit debug available; normal
operation.
HIGH = I/O cell boundary scan test; for board
assembly BSDL test.
EMC_A[0]/P1[0]
L3
VDD_EMC
I/O
EMC address bit 0
I/O
Port 1 GPIO bit 0
EMC_A[1]/P1[1]
L4
VDD_EMC
I/O
EMC address bit 1
I/O
Port 1 GPIO bit 1
EMC_A[2]/P1[2]
M1
VDD_EMC
I/O
EMC address bit 2
I/O
Port 1 GPIO bit 2
EMC_A[3]/P1[3]
M2
VDD_EMC
I/O
EMC address bit 3
I/O
Port 1 GPIO bit 3
EMC_A[4]/P1[4]
M3
VDD_EMC
I/O
EMC address bit 4
I/O
Port 1 GPIO bit 4
EMC_A[5]/P1[5]
N1
VDD_EMC
I/O
EMC address bit 5
I/O
Port 1 GPIO bit 5
EMC_A[6]/P1[6]
N2
VDD_EMC
I/O
EMC address bit 6
I/O
Port 1 GPIO bit 6
EMC_A[7/P1[7]
N3
VDD_EMC
I/O
EMC address bit 7
I/O
Port 1 GPIO bit 7
EMC_A[8]/P1[8]
M4
VDD_EMC
I/O
EMC address bit 8
I/O
Port 1 GPIO bit 8
EMC_A[9]/P1[9]
P1
VDD_EMC
I/O
EMC address bit 9
I/O
Port 1 GPIO bit 9
EMC_A[10]/P1[10]
P2
VDD_EMC
I/O
EMC address bit 10
I/O
Port 1 GPIO bit 10
EMC_A[11]/P1[11]
P3
VDD_EMC
I/O
EMC address bit 11
I/O
Port 1 GPIO bit 11
EMC_A[12]/P1[12]
N4
VDD_EMC
I/O
EMC address bit 12
I/O
Port 1 GPIO bit 12
EMC_A[13]/P1[13]
R1
VDD_EMC
I/O
EMC address bit 13
I/O
Port 1 GPIO bit 13
EMC_A[14]/P1[14]
R2
VDD_EMC
I/O
EMC address bit 14
I/O
Port 1 GPIO bit 14
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