10/31/95
SECTION 1: OVERVIEW
UM Rev.1.0
xxii
MC68341 USER’S MANUAL
MOTOROLA
LIST OF ILLUSTRATIONS (Continued)
Figure
Page
Number
Title
Number
8-1
Simplified Block Diagram ............................................................................. 8-1
8-2
Timer Functional Diagram ............................................................................ 8-3
8-3
External and Internal Interface Signals ........................................................ 8-4
8-4
Input Capture/Output Compare Mode.......................................................... 8-6
8-5
Square-Wave Generator Mode .................................................................... 8-8
8-6
Variable Duty-Cycle Square-Wave Generator Mode ................................... 8-9
8-7
Variable-Width Single-Shot Pulse Generator Mode................................ ..... 8-11
8-8
Pulse-Width Measurement Mode ................................................................. 8-12
8-9
Period Measurement Mode .......................................................................... 8-13
8-10
Event Count Mode ....................................................................................... 8-14
8-11
Timer Module Programming Model .............................................................. 8-17
9-1
QSPM Block Diagram .................................................................................. 9-1
9-2
QSPM Memory Map .................................................................................... 9-2
9-3
QSPI Submodule Diagram........................................................................... 9-16
9-4
Organization of the QSPI RAM .................................................................... 9-27
9-5
Command RAM............................................................................................ 9-28
9-6
Flowchart of QSPI Initialization Operation ................................................... 9-31
9-7
Flowchart of QSPI Master Operation ........................................................... 9-32
9-8
Flowchart of QSPI Slave Operation ............................................................. 9-35
10-1
Test Access Port Block Diagram ................................................................. 10-2
10-2
TAP Controller State Machine ..................................................................... 10-3
10-3
Output Latch Cell (O.Latch) ......................................................................... 10-7
10-4
Input Pin Cell (I.Pin) ..................................................................................... 10-8
10-5
Active-High Output Control Cell (IO.Ctl1)..................................................... 10-8
10-6
Active-Low Output Control Cell (IO.Ctl0) ..................................................... 10-9
10-7
Bidirectional Data Cell (IO.Cell) ................................................................... 10-9
10-8
General Arrangement for Bidirectional Pins................................................. 10-10
10-9
Bypass Register ........................................................................................... 10-12
11-1
Minimum System Configuration Block Diagram ........................................... 11-1
11-2
Sample Crystal Circuit ................................................................................. 11-2
11-3
Statek Corporation Crystal Circuit ................................................................ 11-2
11-4
XFC and VCCSYN Capacitor Connections.................................................. 11-3
11-5
SRAM Interface ............................................................................................ 11-4
11-6
ROM Interface.............................................................................................. 11-4
11-7
Serial Interface ............................................................................................. 11-5
11-8
External Circuitry for 8-Bit Boot ROM .......................................................... 11-5
11-9
8-bit Boot ROM Timing ................................................................................ 11-6
11-10
Access Time Computation Diagram ............................................................ 11-6
11-11
Signal Relationships to CLKOUT ................................................................. 11-7
F
re
e
sc
a
le
S
e
m
ic
o
n
d
u
c
to
r,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
..
.