參數(shù)資料
型號(hào)： MSX340PB480
廠商： FAIRCHILD SEMICONDUCTOR CORP
元件分類： 數(shù)字信號(hào)處理外設(shè)
英文描述： DSP-CROSSBAR SWITCH, PBGA480
封裝： 37.50 X 37.50 MM, 1.27 MM PITCH, MO-149, TBGA-480
文件頁(yè)數(shù)： 26/33頁(yè)
文件大?。?/td> 651K
代理商： MSX340PB480
Preliminary
www.fairchildsemi.com
32
M
SX340
Package Thermal Characteristics
TABLE 13. Package Thermal Characteristics
Thermal performance values are based on simulation data
Power Consumption
There are three components to consider when calculating power for the MSX Family of devices:
1. Steady State Component:
This element equals 252 mW.
2. Connection Component:
This element equals 0.006 mW x Mb/s x connections.
3. Output Drive Component:
This element equals 0.013 mW x number of outputs x Mb/s x capacitive load (pF).
Glossary
Array Side: The signal and connections between the Cros-
spoint Array and the I/O Buffer.
Bus Repeater: A circuit operation of the I/O Buffer that
enables the MSX device to pass data in both directions on
an I/O device pin. The I/O Buffer is placed in a disabled
output state to the pin and to the Crosspoint array. A forced
LOW on either side of the I/O Buffer will be transmitted to
the other side of the I/O Buffer and held until the forced
LOW is changed to a force HIGH. At the change of the
forcing input, the I/O Buffer will force the other side to a fol-
lowing high state and drive a high level out for a period of
time. After the period of time, the I/O Buffer will return to
the disabled state.
Bypass: A JTAG instruction that connects the previous
chip to the next chip through a one bit data register to
speed up programming of other chips in a JTAG chain of
devices.
Clock: Four device corner inputs used to gate data into
registers in the I/O Buffer. The Corner inputs serve two
sides of the MSX. This provides two choices for each I/O
Buffer register in and register out. The neighbor input can
also be used as register clock and the clocks can be
inverted.
Control Register: A programmable register used to con-
trol various functions in programming and other circuit set-
tings.
All
Bits
programmed
in
the
JTAG
Mode.
RapidConfigure Enable bit can be set with a high level on
the RCE pin during a reset of the circuits.
Crosspoint: A single cell containing two N Channel tran-
sistors and two RAM bits. The RAM bits are connected in a
master-slave configuration to provide an update for pro-
gramming and changing program information all at once.
Each cell contains both an X and Y reset to remove all
ports connected to an addressed port in a single program
cycle.
Crosspoint Array: An array of Crosspoint used to connect
any port to any other port or any combination of other ports.
The array has all redundant cell removed; there is a single
Crosspoint cell for each port to port connection. The
reduced cell count is folded to provide a square array. The
array has a diagonal line where the cells are rotated.
Data Bit Lines: A pair of signal lines used to write into and
read out of Crosspoint Cells. The lines are pre-charged
before a read and one is pulled low for a write.
Package
Pin Count
θ
JC (°C/W)
θ
JA (°C/W)
θ
JA (°C/W)
θ
JA (°C/W)
θ
JA (°C/W)
Still Air
200 Ifpm
300 Ifpm
500 Ifpm
PBGA
480
1.7
12.2
10.6
9.86
NA
Power Consumption
= Steady State Component + Connection Component + Output Drive Component.
= 252 mW + (0.006 x Mb/s x #connections) + (0.013 x Mb/s x #outputs x Cload)
The following examples shows the total power consumption as determined by the above formula:
Example 1
Using the MSX340 with 10 Mb/s into a 10pF load with 170 inputs connected to 170 outputs:
Power Consumption
= 252 mW + (0.006 x 10 x 170) + (0.013 x 170 x 10 x 10)
= 252 mW
+
10.2 mW
+
221 mW
= 0.483 Watts
Example 2
Using the MSX340 with 150 Mb/s into a 10pF load with 170 inputs connected to 170 outputs:
Power Consumption
= 252 mW + (0.006 x 150 x 170) + (0.013 x 170 x 150 x 10)
= 252 mW
+
153 mW
+
3315 mW
= 3.72 Watts
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