參數(shù)資料
型號(hào)： MSX340PB480
廠商： FAIRCHILD SEMICONDUCTOR CORP
元件分類(lèi)： 數(shù)字信號(hào)處理外設(shè)
英文描述： DSP-CROSSBAR SWITCH, PBGA480
封裝： 37.50 X 37.50 MM, 1.27 MM PITCH, MO-149, TBGA-480
文件頁(yè)數(shù)： 4/33頁(yè)
文件大?。?/td> 651K
代理商： MSX340PB480
Preliminary
www.fairchildsemi.com
12
M
SX340
Introduction (Continued)
Crosspoint Programming
Connections between ports through the crosspoint array
can be quickly made or broken using the RC interface. The
two ports to be connected or disconnected are addressed
using RCA[9:0] and RCB[9:0]. RCC[1] controls whether a
connection is made or broken. The two ports are con-
nected when RCC[1] is set to zero, and disconnected when
RCC[1] is set to one
Unlike I/O buffer programming commands, which take
effect immediately upon execution of the command, cross-
point connections will only be made if the UPDATE signal
is asserted HIGH. The crosspoint programming command
loads the Loading SRAM cell in the selected crosspoint
array location with a one (in the case of a new connection)
or a zero (to break an existing connection). If the UPDATE
signal is asserted, the Loading SRAM cells contents are
immediately transferred to the Active SRAM cell and the
connection is made or broken. However, if the UPDATE
signal is held LOW, the new connection will not be made.
The UPDATE signal can be used to control when the
switch matrix connections are reconfigured.
I/O Buffer Configuration Programming
Each port can be fully configured in a single RapidConfig-
ure cycle. The figure below shows how an I/O buffer is pro-
grammed using all of the signals on the RC interface. The
following table shows how each control bits (RCC[3:0] and
RCB[9:0]) are used. During an I/O buffer programming
command the RCA[9:0] signals address the port to be pro-
grammed (see Table 6: I/O Buffer Programming Com-
mands)
1
0
1
0
RCI[1:0]
RCC[3:0]
RCB[9:0]
RCA[9:0]
Connect/Disconnect
(0-Connect, 1-Disconnect)
1
2
3
4
5
6
7
8
9
0
1
2
3
4
5
6
7
8
9
0
1
2
3
0
1
Crosspoint Program
0
Port #1
Port #2
0
1
RCI[1:0]
RCC[3:0]
RCB[9:0]
RCA[9:0]
1
2
3
4
5
6
7
8
9
0
1
2
3
4
5
6
7
8
9
0
1
2
3
0
1
I/O Buffer Configuration
0
I/O Buffer Address
Bus Repeater Enable
Input/Output Select
Output Enable Select
Input Enable Select
Output Clock Source
Input Clock Source
Invert Output
Inverted Input Clock
Inverted Output Clock
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