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參數(shù)資料
| 型號： | MSX340PB480 |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 數(shù)字信號處理外設 |
| 英文描述： | DSP-CROSSBAR SWITCH, PBGA480 |
| 封裝： | 37.50 X 37.50 MM, 1.27 MM PITCH, MO-149, TBGA-480 |
| 文件頁數(shù)： | 5/33頁 |
| 文件大?。?/td> | 651K |
| 代理商： | MSX340PB480 |
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Preliminary
13
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MSX340
Introduction (Continued)
TABLE 6. I/O Buffer Programming Commands
Signal
Description
RCC[3]
Bus Repeater Enable. Setting this bit to a one enables the I/O buffer to operate in Bus Repeater Mode, a special
bi-directional mode. When zero the I/O buffer will not operate in Bus Repeater Mode.
When programming an I/O buffer to use Bus Repeater Mode, all of the other control bits must be set to zeroes.
Attempting to combine other I/O buffer options with Bus Repeater Mode may lead to unpredictable results.
RCC[2:1] Input/Output Select. These two bits are used to configure the I/O buffer as an input, output, input/output (bi-
directional mode), or no connect. When operating in bi-directional mode it is critical that the port be assigned
input and output enables so that it can be 3-STATED appropriately to avoid contention.
RCC[2:1]
Function
00
No Connect
01
Input
10
Output
11
Input / Output for Bi-Directional Mode
RCC[0]
and
RCB[9]
Output Enable Select. These two bits are used to select from the two available active low global output enables.
The output will be allowed to drive when its assigned output enable is asserted. An output port will be 3-STATED
when its assigned output enable is de-asserted. When both output enables are selected, the two available active
low output enable signals are AND’ed together to form the port’s combined output enable signal.
RCC[0], RCB[9]
Function
00
No Output Enable Selected
01
Output Enable 1
10
Output Enable 2
11
Both Output Enables
RCB[8:7] Input Enable Select. These bits are used to assign a port one of the two available global input enable signals. An
input port will drive into the crosspoint array when its assigned input enable is asserted. When both input
enables are selected, the two available input enable signals are OR’ed together to form the port’s combined
input enable signal.
RCB[8:7]
Function
00
No Input Enable Selected
01
Input Enable 1
10
Input Enable 2
11
Both Input Enables
RCB[6:5] Output Clock Source. These bits are used to select a clock source for a registered output port. Each I/O buffer
can select from one of two global clock inputs, or can use Next Neighbor Clocking. Next Neighbor Clocking uses
the signal on the next higher numbered port as a clock source. If no clock source is assigned to an output port, it
will operate in flow-through mode.
RCB[6:5]
Function
00
No Output Clock Source Selected
01
Output Clock Source 1
10
Output Clock Source 2
11
Next Neighbor Output Clock Source
Note: The following ports do not have the next neighbor clock option: P009, P060, P103, P155, P197, P248, P288, P339. Please refer to port
cross reference table in the “MSX Family Register Programming Manual”.
RCB[4:3] Input Clock Source. These bits are used to select a clock source for a registered input port. Each I/O buffer can
select from one of two global clock inputs, or can use Next Neighbor Clocking. Next Neighbor Clocking uses the
signal on the next higher numbered port as a clock source. If no clock source is assigned to an input port, it will
operate in flow-through mode.
RCB[6:5]
Function
00
No Input Clock Source Selected
01
Input Clock Source 1
10
Input Clock Source 2
11
Next Neighbor Input Clock Source
Note: The following parts do not have the next neighbor clock option: P009, P060, P103, P155, P197, P248, P288, P339. Please refer to port
cross reference table in the “MSX Family Register Programming Manual”
RCB[2]
Invert Output. If an output port is programmed with this bit set to a one, the output of the port will be inverted. If
this bit is zero, the output will not be inverted. Outputs may not be inverted when operating in Bus Repeater
Mode or in registered output mode.
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