參數(shù)資料
型號(hào)： pentium III
廠商： Intel Corp.
英文描述： pentium III Processor for the PGA370 Socket at 500MHz to 933MHz(工作頻率500到933兆赫茲活動(dòng)帶PGA370插孔奔III處理器)
中文描述： 奔騰III處理器在500MHz到933MHz的（工作頻率500到933兆赫茲活動(dòng)帶PGA370插孔奔三處理器的PGA370插座）
文件頁(yè)數(shù)： 22/78頁(yè)
文件大?。?/td> 610K
代理商： PENTIUM III
22
Datasheet
Pentium
III Processor for the PGA370 Socket at 500 MHz to 933 MHz
2.9
Test Access Port (TAP) Connection
Due to the voltage levels supported by other components in the Test Access Port (TAP) logic, it is
recommended that the processor be the first in the TAP chain and followed by any other
components within the system. A translation buffer should be used to connect the rest of the chain
unless one of the other components is capable of accepting a 1.5V input. Similar considerations
must be made for TCK, TMS, and TRST# signals.
In a two-way MP system design, be cautious when including an empty PGA370 socket in the scan
chain. All sockets in the scan chain must have a processor installed to complete the chain or the
system must support a method to bypass the empty socket; PGA370 termination packages should
not connect TDI to TDO in order to avoid placing the TDO pull-up resistor in parallel.
2.10
Maximum Ratings
Table 5
contains processor stress ratings only. Functional operation at the absolute maximum and
minimum is not implied nor guaranteed. The processor should not receive a clock while subjected
to these conditions. Functional operating conditions are given in the AC and DC tables in
Section 2.11
through
Section 2.13
. Extended exposure to the maximum ratings may affect device
reliability. Furthermore, although the processor contains protective circuitry to resist damage from
static electric discharge, one should always take precautions to avoid high static voltages or electric
fields.
NOTES:
1. Input voltage can never exceed V
SS
+ 2.18 volts.
2. Input voltage can never go below V
TT
- 2.18 volts.
3. Parameter applies to CMOS (except BCLK, PICCLK, and PWRGOOD), APIC, and TAP bus signal groups
only.
4. Parameter applies to CMOS signals BCLK, PICCLK, and PWRGOOD only.
Table 5. Absolute Maximum Ratings
Symbol
Parameter
Min
Max
Unit
Notes
T
STORAGE
Processor storage temperature
–40
85
°C
V
CC
CORE
and
V
TT
Processor core voltage and termination
supply voltage with respect to V
SS
–0.5
2.1
V
V
in
AGTL
AGTL+ buffer input voltage
V
TT
- 2.18
2.18
V
1, 2
V
in
CMOS
1.5
CMOS buffer DC input voltage with respect
to V
SS
V
TT
- 2.18
2.18
V
1, 2, 3
V
in
CMOS
2.5
CMOS buffer DC input voltage with respect
to V
SS
-0.58
3.18
V
4
I
VID
Max VID pin current
5
mA
I
CPUPRES#
Max CPUPRES# pin current
5
mA
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