參數(shù)資料
型號(hào)： pentium III
廠商： Intel Corp.
英文描述： pentium III Processor for the PGA370 Socket at 500MHz to 933MHz(工作頻率500到933兆赫茲活動(dòng)帶PGA370插孔奔III處理器)
中文描述： 奔騰III處理器在500MHz到933MHz的（工作頻率500到933兆赫茲活動(dòng)帶PGA370插孔奔三處理器的PGA370插座）
文件頁(yè)數(shù)： 3/78頁(yè)
文件大?。?/td> 610K
代理商： PENTIUM III
Datasheet
3
Pentium
III Processor for the PGA370 Socket at 500 MHz to 933 MHz
Contents
1.0
Introduction.........................................................................................................................7
1.1
Terminology...........................................................................................................8
1.1.1
Package and Processor Terminology ......................................................8
1.1.2
Processor Naming Convention.................................................................9
1.2
Related Documents.............................................................................................10
2.0
Electrical Specifications....................................................................................................11
2.1
Processor System Bus and V
REF
........................................................................11
2.2
Clock Control and Low Power States..................................................................12
2.2.1
Normal State—State 1 ...........................................................................13
2.2.2
AutoHALT Powerdown State—State 2...................................................13
2.2.3
Stop-Grant State—State 3 .....................................................................13
2.2.4
HALT/Grant Snoop State—State 4 ........................................................14
2.2.5
Sleep State—State 5..............................................................................14
2.2.6
Deep Sleep State—State 6 ....................................................................14
2.2.7
Clock Control..........................................................................................15
2.3
Power and Ground Pins......................................................................................15
2.3.1
Phase Lock Loop (PLL) Power...............................................................16
2.4
Decoupling Guidelines .......................................................................................16
2.4.1
Processor VCC
CORE
Decoupling............................................................16
2.4.2
Processor System Bus AGTL+ Decoupling............................................16
2.5
Processor System Bus Clock and Processor Clocking.......................................17
2.5.1
Mixing Processors of Differrent Frequencies .........................................17
2.6
Voltage Identification...........................................................................................17
2.7
Processor System Bus Unused Pins...................................................................19
2.8
Processor System Bus Signal Groups................................................................19
2.8.1
Asynchronous vs. Synchronous for System Bus Signals.......................20
2.8.2
System Bus Frequency Select Signals (BSEL[1:0])...............................21
2.9
Test Access Port (TAP) Connection....................................................................22
2.10
Maximum Ratings................................................................................................22
2.11
Processor DC Specifications...............................................................................23
2.12
AGTL+ System Bus Specifications .....................................................................27
2.13
System Bus AC Specifications............................................................................27
2.13.1 I/O Buffer Model .....................................................................................28
3.0
Signal Quality Specifications............................................................................................36
3.1
BCLK and PICCLK Signal Quality Specifications and
Measurement Guidelines ....................................................................................36
3.2
AGTL+ Signal Quality Specifications and Measurement Guidelines ..................37
3.3
AGTL+ Signal Quality Specifications and Measurement Guidelines ..................38
3.3.1
Overshoot/Undershoot Guidelines .........................................................38
3.3.2
Overshoot/Undershoot Magnitude .........................................................39
3.3.3
Overshoot/Undershoot Pulse Duration...................................................39
3.3.4
Activity Factor.........................................................................................39
3.3.5
Reading Overshoot/Undershoot Specification Tables............................40
3.3.6
Determining if a System meets the Overshoot/Undershoot
Specifications .........................................................................................41
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