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參數(shù)資料
| 型號： | SZF2002HL |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Low voltage 8-bit microcontroller with 6-kbyte embedded RAM |
| 中文描述： | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | 12 X 12 MM, 1.40 MM HEIGHT, PLASTIC, SOT-315-1, LQFP-80 |
| 文件頁數(shù)： | 16/76頁 |
| 文件大?。?/td> | 431K |
| 代理商： | SZF2002HL |
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1998 Aug 26
16
Philips Semiconductors
Product specification
Low voltage 8-bit microcontroller with
6-kbyte embedded RAM
SZF2002
10 PROGRAM STATUS WORD (PSW)
The Program Status Word contains several status bits that
reflect the current state of the CPU. The PSW, shown in
Table 4, resides in the SFR memory space. It contains the
Carry bit, the Auxiliary Carry (for BCD operations), the two
register bank select bits, the Overflow flag, a Parity bit and
two user-definable status flags.
The Carry bit, other than serving the function of a Carry bit
in arithmetic operations, also serves as the Accumulator
for a number of boolean operations.
Bits RS0 and RS1 are used to select one of the four
register banks; see Table 5. A number of instructions refer
to these RAM locations as R0 through to R7. The selection
of which of the four register banks is being referred to is
made on the basis of the state of RS0 and RS1 at
execution time.
The Parity bit reflects the number of 1s in the Accumulator:
P = 1, if the Accumulator contains an odd number of 1s,
and P = 0, if the Accumulator contains an even number of
1s. Thus, the number of 1s in the Accumulator plus P is
always even. The bits F0 and USR are uncommitted and
may be used as general purpose status flags.
Table 4
Program Status Word (SFR address D0H)
Table 5
Description of PSW bits
7
6
5
4
3
2
1
0
CY
AC
F0
RS1
RS0
OV
USR
P
BIT
SYMBOL
DESCRIPTION
7
6
CY
AC
Carry flag.
The Carry flag receives carry out from bit 7 of ALU operands.
Auxiliary Carry flag.
The Auxiliary Carry flag receives carry out from bit 3 of addition
operands.
General purpose status flag.
Register Bank Select 1
. This bit selects Register Bank 1.
Register Bank Select 0.
This bit selects Register Bank 0.
Overflow flag.
This flag is set by arithmetic operations.
USR.
This is a user-definable flag.
Parity.
If the Accumulator contains an odd number of 1s this bit is set to a logic 1 by
hardware. Otherwise, the state of this bit is a logic 0.
5
4
3
2
1
0
F0
RS1
RS0
OV
USR
P
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