
1998 Aug 26
35
Philips Semiconductors
Product specification
Low voltage 8-bit microcontroller with
6-kbyte embedded RAM
SZF2002
17.2
Serial Port Control and Status Register (S0CON)
The Serial Port Control and Status Register is the Special Function Register S0CON. The register contains not only the
mode selection bits, but also the 9th data bit for transmit and receive (TB8 and RB8), and the serial port interrupt bits
(TI and RI).
Table 33
Serial Port Control Register (SFR address 98H)
Table 34
Description of S0CON bits
Table 35
Selection of the serial port modes
7
6
5
4
3
2
1
0
SMO
SM1
SM2
REN
TB8
RB8
TI
RI
BIT
SYMBOL
DESCRIPTION
7
6
5
SM0
SM1
SM2
Mode select.
These 2 bits are used to select the serial port mode; see Table 35.
Enables the multiprocessor communication feature in Modes 2 and 3. In these modes, if
SM2 = 1, then RI will not be activated if the received 9th data bit (RB8) is a logic 0.
In Mode 1, if SM2 = 1, then RI will not be activated unless a valid stop bit was received.
In Mode 0, SM2 should be a logic 0.
Enable serial reception.
REN is set by software to enable reception, and cleared by
software to disable reception.
Is the 9th data bit that will be transmitted in Modes 2 and 3. Set or cleared by software
as desired.
In Modes 2 and 3, is the 9th data bit received. In Mode 1, if SM2 = 0, then RB8 is the
stop bit that was received. In Mode 0, RB8 is not used.
Transmit interrupt flag.
Set by hardware at the end of the 8th bit time in Mode 0, or at
the beginning of the stop bit time in the other modes, in any serial transmission. Must be
cleared by software.
Receive interrupt flag.
Set by hardware at the end of the 8th bit time in Mode 0, or
halfway through the stop bit time in the other modes, in any serial transmission (except
see SM2). Must be cleared by software.
4
REN
3
TB8
2
RB8
1
TI
0
RI
SMO
SM1
MODE
DESCRIPTION
BAUD RATE
0
0
1
1
0
1
0
1
Mode 0
Mode 1
Mode 2
Mode 3
shift register
8-bit UART
9-bit UART
9-bit UART
1
6
f
clk
variable
1
16
f
clk
or
1
32
f
clk
variable