參數(shù)資料
型號(hào)： TNETA1600
廠商： Texas Instruments, Inc.
英文描述： SONET/SDH ATM Receiver/Transmitter for 622.08-Mit/s or 155.52-Mbit/s Operation(SONET/SDH ATM接收器/傳送器)
中文描述： SONET / SDH的自動(dòng)柜員機(jī)接收器/發(fā)送器為622.08，麻省理工學(xué)院/ s或155.52 - Mbit / s的操作（SONET / SDH的自動(dòng)柜員機(jī)接收器/傳送器）
文件頁數(shù)： 10/54頁
文件大小： 1120K
代理商： TNETA1600
TNETA1600
SONET/SDH ATM RECEIVER/TRANSMITTER
FOR 622.08-MBIT/S OR 155.52-MBIT/S OPERATION
SDNS036 – FEBRUARY 1996
10
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
transmit-cell interface (continued)
The 48-byte information field of the ATM cell is scrambled using a self-synchronizing scrambler polynomial of
x
43
+ 1 to improve the efficiency of the cell-delineation procedure. At startup, the scrambler is initialized to an
all-ones state. The 5-byte ATM header is not scrambled. TXSOC identifies the first byte of the ATM cell and
disables the scrambler. The input data is stored in the transmit input FIFO and multiplexer into the SONET
payload after all 53 bytes of the ATM cell are received. If the FIFO does not contain 53 bytes of information at
the start of a cell-insertion cycle, an idle or unassigned cell is sent depending upon the configuration of the
control register. An idle cell is defined as an ATM cell with the 5-byte header set to 00 00 00 01 52 (hex) and
all 48 bytes of the payload set to a hex value of 6A. An unassigned cell is defined as an ATM cell with the 5-byte
header set to 00 00 00 00 55 (hex) and all 48 bytes of the payload set to a hex value of 6A.
The transmit section is initialized on reset to calculate the header-error-check (HEC) byte in the ATM header.
When this feature is active, the fifth byte of the ATM cell that is input through the transmit-cell interface is ignored.
The HEC byte is calculated in accordance with the appropriate ANSI, CCITT, and ATM Forum specifications
and placed in the fifth byte of the ATM cell. This feature can be disabled for test purposes by setting a bit in the
control register.
transmit overhead
The transmit operation can be controlled to send either a SONET frame or an SDH frame. When both SDHEN
and the enable SDH frames bit in the control register are low, a SONET frame is transmitted. When either
SDHEN or the enable SDH frames bit (or both) are high, an SDH frame is transmitted. A valid clock must be
present at TPCK when the framing mode is changed, as this clock is used to change the overhead-RAM
contents. Because overhead contents are altered, toggling the mode during operation can result in the loss of
transmit-frame alignment and loss of any data being processed in the TNETA1600 transmitter. A hardware or
software reset also causes the overhead RAM to be rewritten with SONET or SDH values, depending on the
status of SDHEN.
For both SONET and SDH transmitted frames, the location of the J1 byte in the path overhead is fixed. The J1
byte always comes after the last C1 byte of the transport overhead. This results in a fixed value for the first H1
byte of 0110 0010 for SONET frames or 0110 1010 for SDH frames. The first H2 byte has a fixed value of 0000
1010 (10 0000 1010 binary is equal to 522 decimal) for both SONET and SDH frames. The H3 bytes are set
to zero. The transport- and path-overhead bytes are multiplexed into the output-byte stream from the
transmit-overhead RAM. All transmit-overhead bytes with values that must be calculated by the TNETA1600
are placed in the transmit-overhead RAM prior to being added to the output data stream. The user has access
to the transmit-overhead RAM through the controller interface and can preset the values of many overhead
bytes. The user can also insert the D1–D12, E1, and E2 bytes into the transmit-data stream through the serial
transmit data-communications port.
The values of the transmit-overhead bytes are initialized at reset or upon a framing-mode change
(SONET/SDH) to the values given in Table 1. Overhead bytes not shown in the table are initialized to all zeroes
(0000 0000). Although the user can program the value of any overhead byte by writing to the transmit-overhead
RAM, several of the values will be automatically overwritten by the TNETA1600. This overwrite occurs after the
first row’s overhead is transmitted (e.g., after J1 at 155.52 Mbit/s). Table 1 denotes the bytes to which this
applies. For example, the B2-byte values are calculated by the TNETA1600 and written into RAM regardless
of whether or not a value was written to B2 via the controller interface. These automatic write operations by the
TNETA1600 are disabled when the transmit-overhead RAM is placed in program mode (accomplished by
setting a bit in the control register or by taking the interface programming mode (IFPRGM) input high). While
in the program mode, overhead values can be written into the TNETA1600 via the controller interface. Since
no values are automatically overwritten, this gives the user the capability to transmit any value in any
overhead-byte location. Specified bytes are automatically overwritten when the program mode is exited.
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