參數(shù)資料
型號(hào)： TNETA1600
廠商： Texas Instruments, Inc.
英文描述： SONET/SDH ATM Receiver/Transmitter for 622.08-Mit/s or 155.52-Mbit/s Operation(SONET/SDH ATM接收器/傳送器)
中文描述： SONET / SDH的自動(dòng)柜員機(jī)接收器/發(fā)送器為622.08，麻省理工學(xué)院/ s或155.52 - Mbit / s的操作（SONET / SDH的自動(dòng)柜員機(jī)接收器/傳送器）
文件頁(yè)數(shù)： 12/54頁(yè)
文件大?。?/td> 1120K
代理商： TNETA1600
TNETA1600
SONET/SDH ATM RECEIVER/TRANSMITTER
FOR 622.08-MBIT/S OR 155.52-MBIT/S OPERATION
SDNS036 – FEBRUARY 1996
12
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Table 1. Transmit Overhead (Continued)
OVERHEAD
BYTE
SONET-FRAME
VALUE INITIALIZED AT RESET
OR FRAME-MODE CHANGE
SDH-FRAME
VALUE INITIALIZED AT RESET
OR FRAME-MODE CHANGE
VALUE
OVER
WRITTEN
EACH
FRAME
J1 (64 bytes)
Default value: 0000 0000
J1 can be modified via controller interface.
Calculated from previous SPE
Default value: 0000 0000
J1 can be modified via controller interface.
Calculated from previous SPE
N
B3
Y
C2
0001 0011
0001 0011
Y
G1 bits 1–4
G1 bits 5–6
G1 bits 7–8
B3 error count ( 0000 – 1000); Path FERF: 1001
PRDI: 01 PLM; 10 PAIS, LOP, LOCA;
11 UNEQ
00
B3 error count (0000 – 1000); Path FERF: 1001
PRDI: 01 PLM; 10 PAIS, LOP, LOCA;
11 UNEQ
00
Y
Calculation of parity bytes B1, B2 (twelve bytes), and B3 are as follows:
–
B1.
B1 is a bit-interleaved parity 8 (BIP-8) code using even parity. B1 is calculated over all bits of the
previous frame after scrambling. The calculated value of B1 is placed in the frame before the frame is
scrambled.
–
B2.
For an STS-12c frame, the twelve B2 bytes combine to form a BIP-96 code. For an STS-3c frame, the
three B2 bytes form a BIP-24 code. However, each B2 byte is calculated as if the frame is composed of
individual STS-1s. Each B2 is calculated, using even parity, over all bits of the line overhead and STS-1
envelope capacity of the previous STS-1 frame before scrambling. The computed value is placed in the
appropriate B2-byte location before scrambling. The line overhead consists of the six rows of
transport-overhead bytes beginning with the first H1 byte and ending before the row containing the first
A1 byte.
–
B3.
The B3 byte is calculated over all bits of the previous SPE before scrambling. B3 is a BIP-8 code using
even parity. The computed value is placed in the B3 location prior to scrambling.
The TNETA1600 transmits path and line far-end block-error (path FEBEs and line FEBEs) counts via the
transmit G1 and third Z2 bytes. The transmit G1-byte (bits 1–4) contains the number of B3 errors detected in
the incoming (receive) frame. The third Z2-byte (bits 2–8) contains the number of B2 errors detected in the
incoming (receive) frame.
The TNETA1600 transmits a line far-end receive-failure (LFERF)
indication via the K2 byte when a receive
loss-of-frame (LOF), loss-of-signal (LOS), or line-alarm indication signal (LAIS) is detected. An LFERF is
indicated by setting bits 6–8 of the transmit K2 byte to 110. The TNETA1600 also transmits a path FERF
(PFERF)
indication if a receive LOF, LOS, LAIS, loss-of-pointer (LOP), or path-alarm indication signal (PAIS)
is detected. A path FERF is indicated by setting bits 1–4 of the transmit G1-byte to 1001. A path remote-defect
indication (PRDI)
is transmitted if a payload-label mismatch (PLM), PAIS, loss-of-pointer (LOP), or
path-unequipped (UNEQ) defect is detected. PRDI is also transmitted if the amount of time that a loss-of-cell
alignment (LOCA) condition persists exceeds the value of the LOCA soak counter, provided that the soak
counter is enabled via the control register. A PRDI is indicated by setting bits 5 and 6 of the transmit G1 byte
as shown below.
G1 BIT 5
G1 BIT 6
DEFECT
0
0
None
0
1
PLM
1
0
PAIS, LOP, LOCA soak
1
1
UNEQ
LFERF, PFERF, and PRDI conditions can also be forced by setting bits in the control register. For example, LFERF is transmitted if the
force-transmit-line FERF bit in control register 2 (address 008 hex) is set to a one, or if LOS, LOF, or LAIS is detected, as described previously.
P
相關(guān)PDF資料
PDF描述
TNETA1610 STS-12c/STM-4 Receiver/Transmitter with Clock Recovery/Generation(STS-12C/STM-4接收/傳送器)
TNETA1611 STS-12c/STM-4 Receiver/Transimitter(STS-12C/STM-4接收/傳送器)
TNETA1630 622.08-MHz Clock-Recovery Device(622.08-MHz時(shí)鐘發(fā)生裝置)
TO-252 TO-252 (MP-3Z)
TODX2402 FIBER OPTIC TRANSCEIVING MODULE
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TNETA1600PCM 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ATM/SONET FRAMER|QFP|160PIN|PLASTIC
TNETA1611PCA 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ATM/SONET Transceiver
TNETA1622 制造商:TI 制造商全稱:Texas Instruments 功能描述:622.08-MHz CLOCK-RECOVERY DEVICE
TNETA1622DW 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Clock/Data Recovery
TNETA1630DW 制造商:Texas Instruments 功能描述:
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*