參數(shù)資料
型號(hào)： TNETA1600
廠商： Texas Instruments, Inc.
英文描述： SONET/SDH ATM Receiver/Transmitter for 622.08-Mit/s or 155.52-Mbit/s Operation(SONET/SDH ATM接收器/傳送器)
中文描述： SONET / SDH的自動(dòng)柜員機(jī)接收器/發(fā)送器為622.08，麻省理工學(xué)院/ s或155.52 - Mbit / s的操作（SONET / SDH的自動(dòng)柜員機(jī)接收器/傳送器）
文件頁(yè)數(shù)： 7/54頁(yè)
文件大小： 1120K
代理商： TNETA1600
TNETA1600
SONET/SDH ATM RECEIVER/TRANSMITTER
FOR 622.08-MBIT/S OR 155.52-MBIT/S OPERATION
SDNS036 – FEBRUARY 1996
7
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Terminal Functions (Continued)
serial-receive data-communications interface
TERMINAL
NAME
I/O
DESCRIPTION
NO.
RSDO
O
Receive serial-data output. The 14 data-communications and orderwire bytes are output serially on RSDO
in the following order: E1, D1 – D12, and E2. The most-significant bit ( MSB) of each byte is sent out first.
Data is valid on the rising edge of RCO. RFPO goes high to identify the concurrent output of the first bit (MSB)
of E1. The remaining seven bits of E1 and the 13 other data-communications and orderwire bytes are then
shifted out on consecutive clock cycles.
RCO
O
Receive clock output. RSDO and RFPO are valid on the rising edge of RCO. RCO is a continuous clock
with a frequency of 1.215 MHz. Once the first A1 byte of a frame is received, all 14 orderwire and
data-communications bytes from the previous frame are serially transmitted in a burst, such that traffic is
not always present on the interface.
RFPO
O
Receive framing-pulse output. RFPO identifies the presence of the first output bit (MSB) of the E1 byte.
When a high signal is clocked out on RFPO, the MSB of E1 is simultaneously clocked out on RSDO.
serial-transmit data-communications interface
TERMINAL
NAME
I/O
DESCRIPTION
NO.
TSDI
I
Transmit serial-data input. When TDEN is high at the time that the first bit of a given byte is to be input, all
eight bits of that byte are input serially on TSDI. Bytes are read in the following order: E1,
D1 – D12, and E2. The MSB of each byte is input first. Data is clocked into the device on the rising edge
of TCO. TFPO goes high to identify the subsequent input of the first bit (MSB) of E1. The remaining seven
bits of E1 and the 13 other data-communications and orderwire bytes are then input on consecutive clock
cycles, provided TDEN is high for the MSB of each byte.
TDEN
I
Transmit data-communications enable. If TDEN is low when the MSB of a given byte is to be input, the
TNETA1600 does not read that byte on TSDI. If TDEN is high when the MSB of a given byte is to be input,
all eight bits of that byte are read on contiguous clock cycles. TDEN is examined for the MSB of E1 on the
first rising edge of TCO, following the rising edge that clocks out a high signal on TFPO.
TCO
O
Transmit clock output. TSDI is clocked in and TFPO is valid on the rising edge of TCO. TCO is a continuous
1.215-MHz clock signal. However, the data is input in a burst, such that traffic is not always present on the
interface.
TFPO
O
Transmit framing-pulse output. TFPO identifies the subsequent input of the first bit (MSB) of the E1 byte.
When a high signal is clocked out on TFPO, the MSB of E1 is clocked in on the next rising edge of TCO,
provided TDEN is high. TFPO is valid on the rising edge of TCO.
P
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