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參數(shù)資料
| 型號(hào)： | TNETA1600 |
| 廠(chǎng)商： | Texas Instruments, Inc. |
| 英文描述： | SONET/SDH ATM Receiver/Transmitter for 622.08-Mit/s or 155.52-Mbit/s Operation(SONET/SDH ATM接收器/傳送器) |
| 中文描述： | SONET / SDH的自動(dòng)柜員機(jī)接收器/發(fā)送器為622.08，麻省理工學(xué)院/ s或155.52 - Mbit / s的操作（SONET / SDH的自動(dòng)柜員機(jī)接收器/傳送器） |
| 文件頁(yè)數(shù)： | 18/54頁(yè) |
| 文件大?。?/td> | 1120K |
| 代理商： | TNETA1600 |
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TNETA1600
SONET/SDH ATM RECEIVER/TRANSMITTER
FOR 622.08-MBIT/S OR 155.52-MBIT/S OPERATION
SDNS036 – FEBRUARY 1996
18
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
control and status registers
The control and status registers contain the operational-state information of the TNETA1600. These registers
provide the user with the ability to program the operation of the TNETA1600 and to monitor the status of the
receive data stream through software. Table 3 shows the addresses of the various registers in the internal RAM.
Table 3. TNETA1600 Register Addresses
ADDRESS
(HEX)
000
REGISTER
Status register no. 1
001
Status register no. 2
002
Status register no. 3
003
Status register no. 4
004
Not implemented
005
Not implemented
006
ID register
007
Control register no. 1
008
Control register no. 2
009
Control register no. 3
00A
Control register no. 4
00B
Control register no. 5
00C
Not implemented
00D
Not implemented
00E
Not implemented
00F
Not implemented
010
Interrupt-mask register no. 1
011
Interrupt-mask register no. 2
012
Interrupt-mask register no. 3
013
Interrupt-mask register no. 4
014
Not implemented
015
Not implemented
016
Line-AIS consecutive-frame count
017
Line-FERF consecutive-frame count
018
Path-RDI consecutive-frame count
019
LOCA-to-path RDI-soak count
01A – OFF
Not implemented
P
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