- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄359412 > VPX3224D (Electronic Theatre Controls, Inc.) Video Pixel Decoders PDF資料下載
參數(shù)資料
| 型號： | VPX3224D |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Video Pixel Decoders |
| 中文描述： | 視頻解碼器像素 |
| 文件頁數(shù)： | 73/92頁 |
| 文件大?。?/td> | 672K |
| 代理商： | VPX3224D |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁當(dāng)前第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁
VPX 3225D, VPX 3224D
PRELIMINARY DATA SHEET
73
Micronas
FP-RAM VPX Front-End
Name
Default
Function
Mode
Number
of Bits
Address
Hex
Color Processing
h’30
12
w
ACC reference level to adjust C
, C
levels on picture bus.
A value of 0 disables the ACC, chroma gain can be adjusted via
ACCb / ACCr register. The setting is updated when ’sdt’ register is
updated.
P/N: 2070
S: 0
accref
h’32
12
w
ACC multiplier value for SECAM Db chroma component to adjust
C
level on picture bus. The setting is updated when ’sdt’ register is
updated.
b [10:0]
eeemmmmmmmm
m * 2
–e
S: 1155
accb
h’33
12
w
ACC multiplier value for SECAM Dr chroma component to adjust C
r
level on picture bus. The setting is updated when ’sdt’ register is
updated.
b [10:0]
eeemmmmmmmm
m * 2
–e
S: 1496
accr
h’39
12
w
amplitude killer level (0: killer disabled)
25
kilvl
h’3A
12
w
amplitude killer hysteresis
5
kilhy
h’DC
12
w
NTSC tint angle,
512 =
π
/4
0
tint
DVCO
h’F8
12
w
crystal oscillator center frequency adjust, –2048 ... 2047
–720
dvco
h’F9
12
r
crystal oscillator center frequency adjustment value for line-locked
mode, true adjust value is DVCO – ADJUST.
For factory crystal alignment, using standard video signal:
set DVCO = 0, set lock mode, read crystal offset from ADJUST
register and use negative value for initial center frequency adjust-
ment via DVCO.
adjust
h’F7
12
w/r
crystal oscillator line-locked mode, lock command/status
write:
100
enable lock
0
disable lock
read:
4095/0
locked/unlocked
0
xlck
FP Status Register
h’12
12
w/r
general purpose control bits
bit [2:0]
bit [3]
bit [8:4]
bit [9]
bit [11:10]
reserved, do not change
vertical standard force
reserved, do not change
disable flywheel interlace
reserved, do not change
to enable vertical free run mode set vfrc=1 and dflw=0
0
1
gp_ctrl
vfrc
dflw
h’13
12
r
automatic standard recognition status
bit [0]
1
bit [1]
1
bit [2]
1
bit [3]
1
bit [4]
1
bit [5]
1
bit [6]
1
bit [7]
1
bit [8]
1
bit [9]
1
bit [11:10]
vertical lock
horizontally locked
no signal detected
color amplitude killer active
disable amplitude killer
color ident killer active
disable ident killer
interlace detected
no vertical sync detection
spurious vertical sync detection
reserved
asr
h’CB
12
r
number of lines per field, P/S: 312, N: 262
nlpf
h’15
12
w/r
vertical field counter, incremented per field
vcnt
h’74
12
r
measured sync amplitude value, nominal: 768
sampl
h’31
12
r
measured burst amplitude
bampl
h’F0
12
r
software version number
bit [7:0]
bit [11:8]
internal software revision number
software release
x
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VPX3224E | Video Pixel Decoders |
| VPX322XE | Video Pixel Decoders |
| VQ1000J | N-Channel Enhancement-Mode MOSFET Transistor(最小漏源擊穿電壓60V,夾斷電流0.225A的N溝道增強(qiáng)型MOSFET晶體管) |
| VQ1000J | N-Channel 60-V (D-S) MOSFET |
| VQ1001J | Dual N-Channel 30-V (D-S) MOSFET with Schottky Diode |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| VPX3224D-C3 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microprocessor |
| VPX3224E | 制造商:MICRONAS 制造商全稱:MICRONAS 功能描述:Video Pixel Decoders |
| VPX3225D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video Pixel Decoders |
| VPX3225D-C3 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microprocessor |
| VPX3225E | 制造商:MICRONAS 制造商全稱:MICRONAS 功能描述:Video Pixel Decoders |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。