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參數(shù)資料
| 型號(hào)： | VPX3224D |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Video Pixel Decoders |
| 中文描述： | 視頻解碼器像素 |
| 文件頁(yè)數(shù)： | 81/92頁(yè) |
| 文件大?。?/td> | 672K |
| 代理商： | VPX3224D |
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VPX 3225D, VPX 3224D
PRELIMINARY DATA SHEET
81
Micronas
FP-RAM VPX Back-End
Name
Default
Function
Mode
Number
of Bits
Address
Hex
Formatter
h’150
12
w
Format Selection
format_sel
bit [1:0]:
Format Selector
00: YUV 4:2:2, ITU-R601
01: YUV 4:2:2, ITU-R656
10: YUV 4:2:2, BStream
0
format
bit [2]:
Shuffler
0
1
Port A = Y, Port B = UV
Port A = UV, Port B = Y
0
shuf
bit [3]:
Format of VBI-data (in ITU-R656 mode only!)
Two possibilities are supported to disable the protected
values 0 and 255:
0
limitation
1
7-bit resolution + odd parity LSB
Note that this selection is applied for lines within the VBI-
window only!
0
range
bit [4]:
Transmission of VBI-data (in ITU-R656 mode only)
0
transmit as normal video data
1
transmit as ancillary data (with ANC-header)
1
ancillary
bit [5]:
PIXCLK selection
Setting this bit activates the half-clock mode, in which
PIXCLK is divided by 2 in order to spread the video data
stream
0
full PIXCLK (normal operation)
1
PIXCLK divided by 2
0
halfclk
bit [6]:
Disable splitting of text data bytes
During normal operation, sliced teletext bytes are splitted
into 2 nibbles and multiplexed to the luminance and
chrominance part. Setting this bit will disable this splitting.
Sliced teletext data will be output directly on the luminance
path. Note that the limitation of luminance data has to be
disabled with bit [8]. The values 0 and 255 will no longer be
protected in the luminance path!
0
splitdis
bit [7]:
reserved (must be set to zero)
0
bit [8]:
Disable limitation of luminance data (see bit [6])
0
enabled
1
disabled
0
dislim
bit [9]:
Suppress ITU–R656 headers for blank lines
0
hsup
bit [10]:
Change of ITU–R656 header flags
0
change header flags in SAV
1
change header flags in EAV
0
flagdel
bit [11]:
reserved (must be set to zero)
0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VPX3224E | Video Pixel Decoders |
| VPX322XE | Video Pixel Decoders |
| VQ1000J | N-Channel Enhancement-Mode MOSFET Transistor(最小漏源擊穿電壓60V,夾斷電流0.225A的N溝道增強(qiáng)型MOSFET晶體管) |
| VQ1000J | N-Channel 60-V (D-S) MOSFET |
| VQ1001J | Dual N-Channel 30-V (D-S) MOSFET with Schottky Diode |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| VPX3224D-C3 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microprocessor |
| VPX3224E | 制造商:MICRONAS 制造商全稱:MICRONAS 功能描述:Video Pixel Decoders |
| VPX3225D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video Pixel Decoders |
| VPX3225D-C3 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microprocessor |
| VPX3225E | 制造商:MICRONAS 制造商全稱:MICRONAS 功能描述:Video Pixel Decoders |
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