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參數(shù)資料
| 型號： | 28F001BX |
| 廠商： | Intel Corp. |
| 英文描述： | 5 V Boot Block Flash Memory(5 V引導(dǎo)塊閃速存儲器) |
| 中文描述： | 5伏啟動塊閃存（5伏引導(dǎo)塊閃速存儲器） |
| 文件頁數(shù)： | 14/39頁 |
| 文件大小： | 648K |
| 代理商： | 28F001BX |
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28F001BX
E
14
Microprocessor read cycles retrieve array data. The
device remains enabled for reads until the
command register contents are altered. Once the
internal write state machine has started an erase or
program operation, the device will not recognize the
Read Array command, until the WSM has
completed its operation. The Read Array command
is functional when V
PP
= V
PPL
or V
PPH
.
4.2
Intelligent Identifier Command
for In-System Programming
The 28F001BX contains an intelligent identifier
operation
to
supplement
programming methodology. The operation is
initiated by writing 90H into the command register.
Following the command Write, a read cycle from
address 00000H retrieves the manufacturer code of
89H. A read cycle from address 00001H returns the
device code of 94H (28F001BX-T) or 95H
(28F001BX-B). To terminate the operation, it is
necessary to write another valid command into the
register. Like the Read Array command, the
Intelligent Identifier command is functional when
V
PP
= V
PPL
or V
PPH
.
traditional
PROM-
Table 3. 28F001BX Command Definitions
First Bus Cycle
Second Bus Cycle
Command
Bus
Cycles
Req’d
Notes
Operation
Address
Data
Operation
Address
Data
Read Array/Reset
1
1
Write
X
FFH
Intelligent Identifier
3
2, 3, 4
Write
X
90H
Read
IA
IID
Read Status Register
2
3
Write
X
70H
Read
X
SRD
Clear Status Register
1
Write
X
50H
Erase Setup/Erase
Confirm
2
2
Write
BA
20H
Write
BA
D0H
Erase Suspend/
Erase Resume
2
Write
X
B0H
Write
X
D0H
Program Setup/
Program
2
2, 3
Write
PA
40H
Write
PA
PD
NOTES:
1.
2.
Bus operations are defined in Table 2.
IA = Identifier Address: 00H for manufacturer code, 01H for device code.
BA = Address within the block being erased.
PA = Address of memory location to be programmed.
SRD = Data read from status register. See Table 4 for a description of the status register bits.
PD = Data to be programmed at location PA. Data is latched on the rising edge of WE#.
IID = Data read from intelligent identifiers.
Following the Intelligent Identifier command, two read operations access manufacture and device codes.
Commands other than those shown above are reserved by Intel for future device implementations and should not be used.
3.
4.
5.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 28F001BX-B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:1-MBIT (128K x 8) BOOT BLOCK FLASH MEMORY |
| 28F001BX-T | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:1-MBIT (128K x 8) BOOT BLOCK FLASH MEMORY |
| 28F001BX-T/28F001BX-B/28F001BN-T/BN-B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:28F001BX-T/28F001BX-B/28F001BN-T/BN-B |
| 28F001BX-T/B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:28F001BX-T/B |
| 28F002BC | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:28F002BC 2-MBIT (256K X 8) BOOT BLOCK FLASH MEMORY |
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