參數(shù)資料
型號(hào): 28F001BX
廠商: Intel Corp.
英文描述: 5 V Boot Block Flash Memory(5 V引導(dǎo)塊閃速存儲(chǔ)器)
中文描述: 5伏啟動(dòng)塊閃存(5伏引導(dǎo)塊閃速存儲(chǔ)器)
文件頁(yè)數(shù): 19/39頁(yè)
文件大?。?/td> 648K
代理商: 28F001BX
E
28F001BX
19
Start
Write 40H,
Byte Address
Write Byte
Address/Data
Read Status
Register
SR.7 = 1
Full Status
Check if Desired
Byte Program
Completed
Read Status
Register Data
(See Above)
V
PP
Range Error
Byte Program Error
Byte Program
Successful
SR.3 = 0
SR.4 = 0
FULL STATUS CHECK PROCEDURE
Bus
Operation
Write
Write
Standby
Repeat for subsequent bytes.
Full status check can be done after each byte, or after a sequence
of bytes.
Write FFH after the last byte programming operation to reset the
device to read array mode.
Bus
Operation
Standby
Standby
SR.3
must
be cleared, if set during a program attempt, before
further attempts are allowed by the write state machine.
SR.4 is only cleared by the Clear Status Register command in
cases where multiple locations are programmed before full status
is checked.
If an error is detected, clear the status register before attempting
retry or other error recovery.
Command
Program Setup
Program
Comments
Data = 40H
Addr = Byte to Be Programmed
Data = Data to Be Programmed
Addr = Byte to Be Programmed
Check SR.7
1 = Ready
0 = Busy
Command
Comments
Check SR.3
1 = V
PP
Low Detect
Check SR.4
1 = Byte Program Error
Read
Status Register Data
Toggle OE# or CE# to Update
Status Register
No
Yes
No
Yes
No
Yes
0406_08
Figure 8. 28F001BX Byte Programming Flowchart
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