參數(shù)資料
型號(hào): 28F001BX
廠商: Intel Corp.
英文描述: 5 V Boot Block Flash Memory(5 V引導(dǎo)塊閃速存儲(chǔ)器)
中文描述: 5伏啟動(dòng)塊閃存(5伏引導(dǎo)塊閃速存儲(chǔ)器)
文件頁(yè)數(shù): 20/39頁(yè)
文件大小: 648K
代理商: 28F001BX
28F001BX
E
20
Start
Write 20H,
Block Address
Write D0H,
Block Address
Read Status
Register
SR.7 = 1
Full Status
Check if Desired
Block Erase
Completed
Read Status
Register Data
(See Above)
V
PP
Range Error
Command Seq. Error
Block Erase Error
Block Erase
Successful
SR.3 = 0
SR.4, 5 = 1 =
SR.5 = 0
FULL STATUS CHECK PROCEDURE
Bus
Operation
Write
Write
Standby
Repeat for subsequent blocks.
Full status check can be done after each block, or after a sequence of
blocks.
Write FFH after the last block erase operation to reset the device to
read array mode.
Bus
Operation
Standby
Standby
SR.3
must
be cleared, if set during an erase attempt, before further
attempts are allowed by the write state machine.
SR.5 is only cleared by the Clear Status Register command in cases
where multiple blocks are erased before full status is checked.
If an error is detected, clear the status register before attempting retry
or other error recovery.
Command
Erase Setup
Erase
Comments
Data = 20H
Addr = Within Block to Be Erased
Check SR.7
1 = Ready
0 = Busy
Command
Comments
Check SR.3
1 = V
PP
Low Detect
Check SR.5
1 = Block Erase Error
Read
Status Register Data
Toggle OE# or CE# to Update
Status Register
Suspend
Erase
Erase Suspend
Loop
No
Yes
No
Yes
Data = D0H
Addr = Within Block to Be Erased
Standby
Check SR.4, 5
Both 1 = Command Sequence
Error
No
Yes
Yes
No
No
Yes
0406_09
Figure 9. 28F001BX Block Erase Flowchart
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