Philips Semiconductors
Pin List
File: pins.fm5, modified 7/25/99
PRELIMINARY INFORMATION
1-7
Audio Out (always acts as sender, but can be master or slave for D/A timing)
AO_OSCLK
156
STRG3
OUT
Over Sampling Clock. This output can be programmed to emit any frequency up to 40
MHz, with a resolution of 0.07 Hz. It is intended for use as the 256 or 384fs over sam-
pling clock by the external D/A conversion subsystem. A board level 22 Ohm series
resistor is recommended to reduce ringing.
AO_SCK
158
PCI
I/O
When Audio Out is programmed to act as the serial interface timing slave (power up
default), AO_SCK acts as input. It receives the Serial Clock from the external audio
D/A subsystem. The clock is treated as fully asynchronous to the TM1100 main
clock.
When Audio Out is programmed to act as serial interface timing master, AO_SCK
acts as output. It drives the Serial Clock for the external audio D/A subsystem. The
clock frequency is a programmable integral divide of the AO_OSCLK frequency.
AO_SCK is limited to 20 MHz. The sample rate of valid samples embedded within the
serial stream is limited by the bandwidth.latency available in the system (
Section 9-10on page 9-8). If used as output, a board level 22 Ohm series resistor is recommended
to reduce ringing.
AO_SD
159
NORM3
OUT
Serial Data to external audio D/A subsystem. The timing of transitions on this output is
determined by the CLOCK_EDGE bit in the AO_SERIAL register, and can be on posi-
tive or negative AO_SCK edges.
AO_WS
155
NORM5
I/O
When Audio-Out is programmed as the serial-interface timing slave (power-up
default), AO_WS acts as an input. AO_WS is sampled on the opposite AO_SCK
edge at which AO_SD is asserted.
When Audio Out is programmed as serial-interface timing master, AO_WS acts as
an output. AO_WS is asserted on the same AO_SCK edge as AO_SD.
AO_WS is the word-select or frame-synchronization signal from/to the external D/A
subsystem. Each audio channel receives 1 sample for every WS period.
Synchronous Serial Interface (SSI) to an off-chip modem front-end)
SSI_CLK
162
PCI
IN
Clock signal of the synchronous serial interface to an off-chip modem analog frontend
or ISDN terminal adapter. Provided by the receive channel of an external communica-
tion device.
SSI_RXFSX
164
PCI
IN
Receive Frame Sync reference of the synchronous serial interface, provided by the
receive channel of an external communication device.
SSI_RXDATA
165
PCI
IN
Receive Serial Data input. Provided by the receive channel of an external communica-
tion device.
SSI_TXDATA
167
NORM3
OUT
Transmit Serial Data output. Sent to the transmit channel of the external communica-
tion device.
SSI_IO1
168
NORM5
I/O
General purpose programmable I/O. Set to input on power up.
SSI_IO2
170
NORM5
I/O
General purpose programmable I/O. Set to input on power up. Can also be pro-
grammed to function as the transmit channel frame synchronization reference output.
Pin Name
MS
QF
P
Pad
Type
Modes
Description