參數資料
型號: 935263151557
廠商: NXP SEMICONDUCTORS
元件分類: 消費家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP240
封裝: 32 X 32 MM, 3.40 MM HEIGHT, MSQFP-240
文件頁數: 25/518頁
文件大小: 7111K
代理商: 935263151557
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TM1100 Preliminary Data Book
Philips Semiconductors
7-18
PRELIMINARY INFORMATION
File: evo.fm5, modified 7/24/99
are read but half the number of pixels per line are read in
YUV 4:2:2 and YUV 4:2:0 formats1. The YUV 4:2:0 for-
mat has half the number of U and V lines in memory that
the YUV 4:2:2 formats have, but each line of U and V
data is read and used twice. See Figure 7-15 through
7.14.2
Data Streaming and Message Passing
Modes
In the
data streaming and message passing modes, the
VO supplies a stream of eight-bit data at up to 80MHz
data rate to the VO_DATA[7:0] pins. Note: In TM1100
implementation the data rate is limited to 60% of the
highway clock. The data is read from SDRAM in packed
form (four 8-bit bytes per 32-bit word).No data selection
or data interpretation is done, and data is transferred at
one byte per VO_CLK from successive byte addresses.
Data-Streaming Mode. In the
data streaming mode,
data is stored in SDRAM in two buffer tables. When the
VO has transferred out the contents of one table, it inter-
rupts the DSPCPU and begins transferring out the con-
tents of the second table. The DSPCPU supplies point-
ers to both tables. The VO can provide a continuous
stream of data to the VO output if the DSPCPU updates
the pointer to the next table before the VO starts trans-
ferring data from the next table.
When each buffer has been transferred, the correspond-
ing buffer empty bit is set in the status register, and the
DSPCPU is interrupted if the buffer empty interrupt is en-
abled. To maintain continuous transfer of data, the
DSPCPU supplies new pointers for the next data buffer
following each buffer empty interrupt. If the DSPCPU
does not supply new pointers before the next field, the
URUN bit is set, and the VO uses the same pointer val-
ues until they are updated.
Message-Passing Mode
. In the message passing
mode data is stored in SDRAM in one buffer table. In this
mode, it is required that SYNC_MASTER is set to ensure
correct operation of VO_IO1 and VO_IO2 as outputs.
When
message
passing
is
started
by
setting
VO_ENABLE in the VO_CTL register, the VO sends a
Start condition on VO_IO1. When the VO has transferred
out the contents of the table, it sends an End condition
on
VO_IO2
as
shown
in
sets
BFR1_EMPTY, and interrupts the DSPCPU. The VO
stops and no further operation takes place until the
DSPCPU sets VO_ENABLE for another message or oth-
er VO operation.
7.14.3
Interrupts and Error Conditions
The VO has five interrupt conditions defined by bits in the
VO_STATUS
register.
These
are
BFR1_EMPTY,
BFR2_EMPTY, HBE, URUN, and YTR. Each of these
conditions has a corresponding interrupt enable flag and
interrupt acknowledge action bit in the VO_CTL register.
VO asserts a SOURCE 10 interrupt request to the
TM1100 vectored interrupt controller as long as one or
more enabled events are asserted. The interrupt control-
ler should always be set such that the Video Out interrupt
operates in level triggered mode. This ensures that no
event is lost to the interrupt handler. Refer to Section
rupts),” for a description of setting level triggered mode
as well as recommendations on writing interrupt han-
dlers.
The BFR1_EMPTY, BFR2_EMPTY and YTR interrupts
are status flags to the DSPCPU indicating that a buffer
has been emptied or that the Y threshold has been
reached.
The URUN flag indicates that the DSPCPU did not per-
form a timely ACK to indicate the update of the address
pointers for the next field or buffer. In this case, the VO
uses the old address pointer value and continues image
or data transfer. When the DSPCPU updates the pointer,
the new pointer value will be used at the start of the next
frame or buffer transfer. The URUN flag is therefore a
status flag that tells the DSPCPU that the VO is using the
old pointer values because it did not receive the new
ones in time. The URUN flag is set if the previous buffer-
empty interrupt was not acknowledged. Note: the actual
write of the buffer pointer MMIO registers is not seen by
the hardware - the ACK bit write signals buffer availabili-
ty.
The HBE, Hardware Bandwidth Error flag indicates that
the VO did not get data from SDRAM via TM1100’s inter-
nal data highway in time to continue the data transfer or
video refresh. Data or video refresh will continue, using
whatever data is in the VO internal data buffers. The ad-
dress counter for the failing buffer(s) will continue to
count, and the VO will continue to request data from the
SDRAM over the highway until the highway can provide
the requested data in time.
The VO has no error conditions that cause system hard-
ware problems. The VO is a read only device, transfer-
ring data from SDRAM to the VO output port. Unlike Vid-
eo In, the VO does not modify SDRAM data.
URUN and HBE are the only VO error conditions. In the
case of URUN or HBE, the worst that happens is a
scrambled image may be displayed for one frame or that
incorrect data is sent for one buffer cycle.
Even changing operating modes does not cause a sys-
tem hardware problem. Changing the MODE bits, the
Overlay Enable and Format bits, or the Little Endian bit
may cause wrong data to be displayed or transferred.
However, the VO does not detect this or stop for it.
In normal operation, the user should not change the
mode or transfer control bits while the VO is enabled.The
VO should be disabled before changing the MODE bits,
the OL_EN bit, or the LTL_END bit. However if these bits
are changed while the VO is running, they will take effect
at the beginning of the next field or buffer.
1.
Note that consecutive Pixel components of each line
are stored in consecutive memory addresses but con-
secutive lines need not be in consecutive memory ad-
dresses
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