Philips Semiconductors
System Boot
File: boot.fm5, modified 7/23/99
PRELIMINARY INFORMATION
12-3
tirely software defined. The value is loaded by the sys-
tem boot block from the EEPROM and published in the
PCI configuration space register at offset 0x2C to pro-
vide the 16 bit Subsystem ID and Subsystem Vendor ID
values. These values are used by driver software to dis-
tinguish the board vendor and product revision informa-
tion for multiple board products based on the TM1100
choice of values.
The MM_CONFIG and PLL_RATIOS registers control
the hardware of the main-memory interface and TM1100
on-chip clock circuits. These registers are described in
The boot value should be set to reflect the exact capabil-
ities of the actual SDRAM in the system.
The ‘enable internal PCI_CLK generator’ bit determines
the PCI_CLK pin operating mode. If a ‘0’ is present in this
bit, PCI_CLK acts compatible with TM1000 and normal
PCI operation, i.e. it is an input pin that takes PCI clock
from the external world. If a ‘1’ is present in this bit, an on-
chip clock divider in the XIO logic becomes the source of
PCI_CLK, and the PCI_CLK pin is configured as an out-
put. In the latter case, the PCI_CLK frequency can be
programmed to a divider of the TM1100 highway clock
by setting the XIO_CTL register ‘Clock Frequency’ divid-
Bus.” Note: This bit must be set if no external PCI clock
is supplied.
The autonomous/host-assisted boot bit determines
whether the system boot logic will continue reading more
information from the EEPROM or halt its operation so the
host can complete system initialization. After the infor-
mation listed in
Table 12-2 has been loaded into TM1100
registers, an external PCI host processor can finish the
initialization of tm1100. If no external PCI host processor
is present, the autonomous/host-assisted boot bit should
be set to one to allow the system boot logic to load the
information described in the next section.
10
1 (400 kHz)
128
390.6 kHz
11 (33 MHz)
0 (100 kHz)
336
98.2 kHz
11
1 (400 kHz)
96
343.8 kHz
Table 12-3I2C speed as a function of EEPROM byte 0
BOOT_CLK
bits
EEPROM
speed bit
divider
value
actual I2C
speed