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| 型號(hào)： | 935263331557 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP240 |
| 封裝： | 32 X 32 MM, 3.40 MM HEIGHT, MSQFP-240 |
| 文件頁數(shù)： | 110/518頁 |
| 文件大小： | 7111K |
| 代理商： | 935263331557 |
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TM1100 Preliminary Data Book
Philips Semiconductors
13-12
PRELIMINARY INFORMATION
File: icp.fm5, modified 7/26/99
output pixel at the relative offset from 0.0 indicated by the
LSBs.
The Y Counter selects the next pixel from the input buff-
er. A new pixel is clocked into the filter registers only
when the Y Counter contents change. The Y Counter
contents change only when the Y MSB Counter is loaded
with a value greater than zero. Note that for Y increment
values less than 1.0 (up scaling), the change will be
caused by carry increment from the Y LSBs, and a new
pixel will not be clocked into the filter shift register on ev-
ery Y clock.
For increment values of 2.0 or for values of 1.0 or greater
with carry in (down scaling), multiple new pixels will be
clocked into the filter shift register before the filter inputs
are ready. The number of new bytes needed for the next
pixel is the sum of the Y Increment Integer value and the
carry out of the Y LSB adder. This result is loaded into
the Y MSB Counter. The filter clock is stalled until the in-
puts are ready. The integer value of the increment -- in-
cluding carry -- defines the number of new pixels to be
clocked through the shift register before the filter inputs
are ready for use.
In this discussion, the Y Counter LSBs form a 16-bit bi-
nary number. The upper 5 bits of this 16-bit number form
a 5-bit binary number between 0 and 31 representing a
fractional distance between Y pixels between 0/32 and
32/31. If the new pixel relative distance is 31/32, it is
nearest the right pixel of the two pixels it is in between,
and the right 2 pixels will be more heavily weighted than
the left 3.
The horizontal filter shown in Figure 13-11 is pipelined to
generate a pixel for every integer increment of the Y
Counter. The filter input is always 5 clocks ahead of its
output. The first stage generates the filter term an+2Xn+2
using the data from the input block and the an+2 coeffi-
cient from the coefficient RAM driven by the Y LSBs. The
second stage registers hold the data for Xn+1 and its cor-
responding Y LSBs and generate an+1Xn+1. The last
stage registers hold the data for Xn-2 and the Xn-2 LSBs
and generate an-2Xn-2.
The LSB Register contents can change on every clock.
In the 2:1 scaling example, the LSBs alternated between
0.0 and 0.5. The LSB Counter represents each output
pixel’s x offset value from the input pixel grid. The LSB
Increment value is 16 bits long. The 5 upper bits go to the
coefficient RAMs, and the 11 lower bits provide precision
increment of the LSB Counter for precision in represent-
ing the scaling factor. The 11 lower bits of the LSB Incre-
ment value added to the 11 lower bits of the LSB Counter
determine when to increment the 5 LSBs that drive the
coefficient RAMs and when to clock a new Y pixel into
the filter.
13.5.7.1
Loading the Extra Pixels in the Filter
For a 5-tap filter, you need 4 more pixels input to the filter
than you generate at the filter output, two before the first
pixel and two after the last pixel. In the worst case of a
window that is exactly N blocks wide and starts at the first
pixel of the first block, you will need to read two extra
blocks - one at each end of the window - in order to get
these 4 pixels! This is an unavoidable problem with a
multi-tap filter. For an n-tap filter, you need n-1 extra pix-
els. There are two ways to avoid this efficiency hit of
fetching extra blocks.
1. Move the window edges so they are not within 2 pixels
of a 64 input pixel boundary.
2. Simulate the edge pixels, such as by mirroring the pair
of pixels you have on the other side. This is the only
solution to the problem of starting (or ending) at the
edge of the image, where there are no pixels to the left
(or right) of the image window.
The ICP uses automatic mirroring to supply these pixels.
Mirroring is used in both horizontal and vertical filter
modes.
13.5.7.2
Mirroring Pixels at the Ends of a
Line
A line may start and/or end at the edge of the input im-
age. In this case, you are missing the two start and/or
end pixels needed for the first and last pixels of the line,
respectively. The start mirror uses the two pixels to the
right of the first pixel, and the end mirror uses the two pix-
els to the right of the last pixel. These pixels are supplied
by controlling the Y counter.
A mirror multiplexer in the 5-tap filter provides mirroring
of one or two pixels at the filter inputs. This mirror multi-
plexer is used for both horizontal and vertical filtering. In
horizontal filtering, the first and last two pixels in the line
are mirrored. The mirror multiplexer is set to the appro-
priate mirror code for the first and last two pixels in the
line. The first two pixels are mirrored for the first two clock
pulses, and the last two pixels are detected using the pix-
el counter for the line.
Mirroring is optional, depending on whether the start or
end of the line is on a window boundary. The DSPCPU
or microprogram must detect this and enable start and/or
end mirroring as required.
13.5.7.3
Horizontal Filter SDRAM Timing
Figure 13-13 shows a timing diagram for block data flow
between the SDRAM and the filter for a scaling factor of
1.0. The bus block reads and writes are one fourth of the
filter processing time because the filter processes data at
100 mega pixels per second, and the SDRAM reads and
writes blocks of pixels at 400 megapixels per second.
The SDRAM logic reads the next block while the current
block is being processed. This also provides the two pix-
els from the next block required to finish filtering the cur-
rent block.
If the scaling factor is greater or less than 1.0. the
SDRAM bus activity will be different. For scaling factors
greater than 1.0, there will be fewer SDRAM reads for
the same number of writes generated by the filter. For
example, a scale factor of 2.0 means that you need to
read only half as many blocks to generate the same
number of output blocks. For a scale factor less than
one, there will be more reads for the same number of
writes. For a scale factor of 0.5, you need to read two
blocks for every block of output. If the scale factor is less
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