Philips Semiconductors
DSPCPU Operations for TM1100
File: ops.fm5, modified 7/23/99
PRELIMINARY INFORMATION
A-37
Floating-point absolute value
SYNTAX
[ IF r
guard ] fabsval rsrc1
→ rdest
FUNCTION
if r
guard then {
if (oat)r
src1 < 0 then
r
dest
← –(oat)rsrc1
else
r
dest
← (oat)rsrc1
}
ATTRIBUTES
Function unit
falu
Operation code
115
Number of operands
1
Modier
No
Modier range
—
Latency
3
Issue slots
1, 4
DESCRIPTION
The fabsval operation computes the absolute value of the argument r
src1 and stores the result into rdest. All
values are in IEEE single-precision oating-point format. If an argument is denormalized, zero is substituted for the
argument before computing the absolute value, and the IFZ ag in the PCSW is set. If fabsval causes an IEEE
exception, the corresponding exception ags in the PCSW are set. The PCSW exception ags are sticky: the ags can
be set as a side-effect of any oating-point operation but can only be reset by an explicit writepcsw operation. The
update of the PCSW exception ags occurs at the same time as r
dest is written. If any other oating-point compute
operations update the PCSW at the same time, the net result in each exception ag is the logical OR of all
simultaneous updates ORed with the existing PCSW value for that exception ag.
The fabsvalflags operation computes the exception ags that would result from an individual fabsval.
The fabsval operation optionally takes a guard, specied in r
guard. If a guard is present, its LSB controls the
modication of the destination register. If the LSB of r
guard is 1, rdest and the exception ags in PCSW are written;
otherwise, r
dest is not changed and the operation does not affect the exception ags in PCSW.
EXAMPLES
Initial Values
Operation
Result
r30 = 0x40400000 (3.0)
fabsval r30
→ r90
r90
← 0x40400000 (3.0)
r35 = 0xbf800000 (-1.0)
fabsval r35
→ r95
r95
← 0x3f800000 (1.0)
r40 = 0x00400000 (5.877471754e-39)
fabsval r40
→ r100
r100
← 0x0 (+0.0), IFZ set
r45 = 0xffffffff (QNaN)
fabsval r45
→ r105
r105
← 0xffffffff (QNaN)
r50 = 0xffbfffff (SNaN)
fabsval r50
→ r110
r110
← 0xffffffff (QNaN), INV set
r10 = 0,
r55 = 0xff7fffff (–3.402823466e+38)
IF r10 fabsval r55
→ r115
no change, since guard is false
r20 = 1,
r55 = 0xff7fffff (–3.402823466e+38)
IF r20 fabsval r55
→ r120
r120
← 0x7f7fffff (3.402823466e+38)
SEE ALSO
fabsval