參數(shù)資料
型號(hào)： AM79C971
廠商： Advanced Micro Devices, Inc.
英文描述： PCnet⑩-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus
中文描述： PCnet⑩快速單芯片全雙工10/100 Mbps以太網(wǎng)控制器，PCI總線
文件頁(yè)數(shù)： 170/265頁(yè)
文件大小： 3190K
代理商： AM79C971
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170
Am79C971
P R E L I M I N A R Y
Table 35.
Interface Pin Assignment
BCR20: Software Style
This register is an alias of the location CSR58. Accesses
to and from this register are equivalent to accesses to
CSR58.
Bit
Name
Description
31-16 RES
Reserved locations. Written as
zeros and read as undefined.
15-11 RES
Reserved locations. Written as
zeros and read as undefined.
10
APERREN
Advanced Parity Error Handling
Enable. When APERREN is set
to 1, the BPE bits (RMD1 and
TMD1, bit 23) start having a
meaning. BPE will be set in the
descriptor associated with the
buffer that was accessed when a
data parity error occurred. Note
that since the advanced parity er-
ror handling uses an additional bit
in the descriptor, SWSTYLE (bits
7-0 of this register) must be set to
2 or 3 to program the Am79C971
controller to use 32-bit software
structures.
APERREN does not affect the re-
porting of address parity errors or
data parity errors that occur when
the Am79C971 controller is the
target of the transfer.
Read anytime; write accessible
only when either the STOP or the
SPND bit is set. APERREN is
cleared by H_RESET and is not
affected by S_RESET or STOP.
9
RES
Reserved locations. Written as
zeros; read as undefined.
8
SSIZE32
Software Size 32 bits. When set,
this
bit
indicates
Am79C971 controller utilizes 32-
bit software structures for the ini-
tialization block and the transmit
that
the
and receive descriptor entries.
When cleared, this bit indicates
that the Am79C971 controller uti-
lizes 16-bit software structures for
the initialization block and the
transmit and receive descriptor
entries.
In
this
Am79C971 controller is back-
wards
compatible
Am7990 LANCE and Am79C960
PCnet-ISA controllers.
mode,
the
with
the
The value of SSIZE32 is deter-
mined by the Am79C971 control-
ler according to the setting of the
Software Style (SWSTYLE, bits
7-0 of this register).
Read
SSIZE32 is read only; write oper-
ations will be ignored. SSIZE32
will be cleared after H_RESET
(since SWSTYLE defaults to 0)
and is not affected by S_RESET
or STOP.
accessible
always.
If SSIZE32 is reset, then bits
IADR[31:24] of CSR2 will be
used to generate values for the
upper 8 bits of the 32-bit address
bus during master accesses initi-
ated by the Am79C971 controller.
This action is required, since the
16-bit software structures speci-
fied by the SSIZE32 = 0 setting
will yield only 24 bits of address
for Am79C971 controller bus
master accesses.
If SSIZE32 is set, then the soft-
ware structures that are common
to the Am79C971 controller and
the host system will supply a full
32 bits for each address pointer
that is needed by the Am79C971
controller for performing master
accesses.
RST Pin
Low
High
PREAD or Auto
Read in Progress
X
1
EEN
X
X
EECS
0
Active
From ECS
Bit of BCR19
0
EESK
Tri-State
Active
From ESK Bit of
BCR19
LED1
EEDI
Tri-State
Active
High
0
1
From EEDI Bit of
BCR19
LED0
High
0
0
相關(guān)PDF資料
PDF描述
AM79C971KCW IC LOGIC 16211 24-BIT FET BUS SWITCH -40+85C TSSOP-56 35/TUBE
AM79C972BKCW PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support
AM79C972BKIW PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support
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AM79C972 PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM79C971AKC 制造商:Advanced Micro Devices 功能描述:
AM79C971AVC 制造商:Advanced Micro Devices 功能描述:10/100 MBPS ETHERNET - Trays
AM79C971AVC\\W 制造商:Rochester Electronics LLC 功能描述:- Bulk
AM79C971AVC\W 制造商:Rochester Electronics LLC 功能描述:- Bulk
AM79C971AWW WAF 制造商:Advanced Micro Devices 功能描述:
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