參數(shù)資料
型號(hào)： AM79C971
廠商： Advanced Micro Devices, Inc.
英文描述： PCnet⑩-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus
中文描述： PCnet⑩快速單芯片全雙工10/100 Mbps以太網(wǎng)控制器，PCI總線
文件頁(yè)數(shù)： 188/265頁(yè)
文件大?。?/td> 3190K
代理商： AM79C971
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188
Am79C971
24
ENP
End of Packet indicates that this
is the last buffer to be used by the
Am79C971 controller for this
frame. It is used for data chaining
buffers. If both STP and ENP are
set, the frame fits into one buffer
and there is no data chaining.
ENP is set by the host and is not
changed by the Am79C971 con-
troller.
23
BPE
Bus Parity Error is set by the
Am79C971 controller when a par-
ity error occurred on the bus inter-
face during a data transfers from
the transmit buffer associated
with
this
descriptor.
Am79C971 controller will only set
BPE when the advanced parity
error handling is enabled by set-
ting APERREN (BCR20, bit 10) to
1. BPE is set by the Am79C971
controller and cleared by the
host.
The
This bit does not exist, when the
Am79C971 controller is pro-
grammed to use 16-bit software
structures for the descriptor ring
entries (BCR20, bits 7-0, SW-
STYLE is cleared to 0).
22-16
RES
Reserved locations.
15-12
ONES
These four bits must be written as
ones. This field is written by the
host and unchanged by the
Am79C971 controller.
11-00
BCNT
Buffer Byte Count is the usable
length of the buffer pointed to by
this descriptor, expressed as the
two
’
s complement of the length of
the buffer. This is the number of
bytes from this buffer that will be
transmitted by the Am79C971
controller. This field is written by
the host and is not changed by
the Am79C971 controller. There
are no minimum buffer size re-
strictions.
TMD2
Bit
Name
Description
31
BUFF
Buffer error is set by the
Am79C971
controller
transmission
Am79C971 controller does not
find the ENP flag in the current
descriptor and does not own the
next descriptor. This can occur in
either of two ways:
during
when
the
1. The OWN bit of the next buffer
is 0.
2. FIFO underflow occurred be-
fore the Am79C971 controller ob-
tained
the
STATUS
(TMD1[31:24]) of the next de-
scriptor. BUFF is set by the
Am79C971
controller
cleared by the host.
byte
and
If a Buffer Error occurs, an Un-
derflow Error will also occur.
BUFF is not valid when LCOL or
RTRY error is set during transmit
data chaining. BUFF is set by the
Am79C971
controller
cleared by the host.
and
30
UFLO
Underflow error indicates that the
transmitter has truncated a mes-
sage because it could not read
data from memory fast enough.
UFLO indicates that the FIFO has
emptied before the end of the
frame was reached.
When DXSUFLO (CSR3, bit 6) is
cleared to 0, the transmitter is
turned off when an UFLO error
occurs (CSR0, TXON
=
0).
When DXSUFLO is set to 1, the
Am79C971 controller gracefully
recovers from an UFLO error. It
scans the transmit descriptor ring
until it finds the start of a new
frame and starts a new transmis-
sion.
UFLO is set by the Am79C971
controller and cleared by the
host.
29
EXDEF
Excessive Deferral. Indicates that
the transmitter has experienced
Excessive Deferral on this trans-
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PDF描述
AM79C971KCW IC LOGIC 16211 24-BIT FET BUS SWITCH -40+85C TSSOP-56 35/TUBE
AM79C972BKCW PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support
AM79C972BKIW PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM79C971AKC 制造商:Advanced Micro Devices 功能描述:
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AM79C971AVC\W 制造商:Rochester Electronics LLC 功能描述:- Bulk
AM79C971AWW WAF 制造商:Advanced Micro Devices 功能描述:
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