參數(shù)資料
型號(hào): AM79C971
廠商: Advanced Micro Devices, Inc.
英文描述: PCnet⑩-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus
中文描述: PCnet⑩快速單芯片全雙工10/100 Mbps以太網(wǎng)控制器,PCI總線
文件頁數(shù): 187/265頁
文件大小: 3190K
代理商: AM79C971
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Am79C971
187
TMD1
Bit
Name
Description
31
OWN
This bit indicates whether the de-
scriptor entry is owned by the
host (OWN = 0) or by the
Am79C971 controller (OWN = 1).
The host sets the OWN bit after
filling the buffer pointed to by the
descriptor entry. The Am79C971
controller clears the OWN bit af-
ter transmitting the contents of
the buffer. Both the Am79C971
controller and the host must not
alter a descriptor entry after it has
relinquished ownership.
30
ERR
ERR is the OR of UFLO, LCOL,
LCAR, RTRY or BPE. ERR is set
by the Am79C971 controller and
cleared by the host. This bit is set
in the current descriptor when the
error occurs and, therefore, may
be set in any descriptor of a
chained buffer transmission.
29
ADD_FCS
ADD_FCS dynamically controls
the generation of FCS on a frame
by frame basis. It is valid only if
the STP bit is set. When
ADD_FCS is set, the state of
DXMTFCS is ignored and trans-
mitter FCS generation is activat-
ed. When ADD_FCS is cleared to
0, FCS generation is controlled
by
DXMTFCS.
APAD_XMT (CSR4, bit 11) is set
to 1, the setting of ADD_FCS has
no effect on frames shorter than
64 bytes. ADD_FCS is set by the
host, and is not changed by the
Am79C971 controller. This is a
reserved bit in the C-LANCE
(Am79C90) controller.
When
28
MORE/LTINT Bit 28 always functions as
MORE. The value of MORE is
written by the Am79C971 control-
ler and is read by the host. When
LTINTEN is cleared to 0 (CSR5,
bit 14), the Am79C971 controller
will never look at the contents of
bit 28, write operations by the
host have no effect. When LTINT-
EN is set to 1 bit 28 changes its
function to LTINT on host write
operations and on Am79C971
controller read operations.
MORE
MORE indicates that more than
one retry was needed to transmit
a frame. The value of MORE is
written by the Am79C971 control-
ler. This bit has meaning only if
the ENP bit is set.
LTINT
LTINT is used to suppress inter-
rupts after successful transmis-
sion on selected frames. When
LTINT is cleared to 0 and ENP is
set to 1, the Am79C971 controller
will not set TINT (CSR0, bit 9) af-
ter a successful transmission.
TINT will only be set when the
last descriptor of a frame has
both LTINT and ENP set to 1.
When LTINT is cleared to 0, it will
only cause the suppression of in-
terrupts for successful transmis-
sion. TINT will always be set if the
transmission has an error. The
LTINTEN overrides the function
of TOKINTD (CSR5, bit 15).
27
ONE
ONE indicates that exactly one
retry was needed to transmit a
frame. ONE flag is not valid when
LCOL is set. The value of the
ONE bit is written by the
Am79C971 controller. This bit
has meaning only if the ENP bit is
set.
26
DEF
Deferred
Am79C971 controller had to de-
fer while trying to transmit a
frame. This condition occurs if the
channel is busy when the
Am79C971 controller is ready to
transmit. DEF is set by the
Am79C971
controller
cleared by the host.
indicates
that
the
and
25
STP
Start of Packet indicates that this
is the first buffer to be used by the
Am79C971 controller for this
frame. It is used for data chaining
buffers. The STP bit must be set
in the first buffer of the frame, or
the Am79C971 controller will skip
over the descriptor and poll the
next descriptor(s) until the OWN
and STP bits are set. STP is set
by the host and is not changed by
the Am79C971 controller.
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