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參數(shù)資料
| 型號(hào)： | CS8952-IQZ |
| 廠商： | Cirrus Logic Inc |
| 文件頁數(shù)： | 15/81頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TXRX 100/10 PHY 100TQFP |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 類型： | 收發(fā)器 |
| 規(guī)程： | MII |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-LQFP |
| 供應(yīng)商設(shè)備封裝： | 100-TQFP（14x14） |
| 包裝： | 托盤 |
| 產(chǎn)品目錄頁面： | 759 (CN2011-ZH PDF) |
| 其它名稱： | 598-1208 |
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CS8952
CrystalLAN 100BASE-X and 10BASE-T Transceiver
22
DS206F1
Table 3. 4B5B Code Violation Decoding
3.1.1.2
100 Mb/s Loopback
One of two internal 100BASE-TX loopback modes
can be selected. Local loopback redirects the
TXD[3:0] input data to RXD[3:0] data outputs
through the 4B5B coders and scramblers. Local
loopback is selected by asserting pin LPBK, by set-
ting the LPBK bit (bit 14) in the Basic Mode Con-
trol Register (address 00h) or by setting bits 8 and
11 in the Loopback, Bypass, and Receiver Error
Mask Register (address 18h) as shown in Table 4.
Remote loopback redirects the analog line interface
inputs to the analog line driver outputs. Remote
loopback is selected by setting bit 9 in the Loop-
back, Bypass, and Receiver Error Mask Register
(address 18h) as shown in Table 4.
When changing between local and non-loopback
modes, the data on RXD[3:0] will be undefined for
approximately 330 s.
3.1.2
100BASE-X Repeater Application
The CS8952 provides two low latency modes for
repeater applications. These are selected by assert-
ing either pin BPALIGN or BP4B5B. Both pins
have the effect of bypassing the 4B5B encoder and
decoder. Bypassing the coders decreases latency,
and uses a 5-bit wide parallel code group interface
on pins RXD[4:0] and TXD[4:0] instead of the 4-
bit wide MII nibble interface on pins RXD[3:0] and
TXD[3:0]. In repeater mode, pin RX_ER is rede-
fined as the fifth receive data bit (RXD4), and pin
TX_ER is redefined as the fifth transmit data bit
(TXD4).
BPALIGN can also be selected by setting bit 12 in
Loopback, Bypass, and Receiver Error Mask Reg-
ister (address 18h). BP4B5B can be selected by set-
ting bit 14 of the same register.
Pin BPALIGN causes more of the CS8952 to be
bypassed than the BP4B5B pin. BPALIGN also by-
passes the scrambler/descrambler, and the NRZI to
NRZ converters (see Figure 1). Also, for repeater
applications, pin REPEATER should be asserted to
redefine the function of the CRS (carrier sense) pin.
The REPEATER function may also be invoked by
setting bit 12 in the PCS Sublayer Configuration
Register (address 17h).
For repeater applications, the RX_EN pin can be
used to gate the receive data pins (RXD[4:0],
V6
01000
0110 or 0101 (Note 2)1100
V7
01100
0110 or 0101 (Note 2)1101
V8
10000
0110 or 0101 (Note 2)1110
V9
11001
0110 or 0101 (Note 2)
1111
1. CONTROL code groups become violations when found in the data portion of the frame.
2. Invalid code groups are mapped to 5h unless the Code Error Report select bit in the Loopback,
Bypass, and Receiver Error Mask Register (address 18h) is set, in which case invalid code groups are
mapped to 6h.
Code Violations (RX_ER = 1 or TX_ER = 1)
Name
5-bit Symbol
Normal Mode 4-bit
Nibble
Error Report
Mode 4-bit
Nibble
Comments
Remote
Loopback
(bit 9)
PMD
Loopback
(bit 8)
Function
0
No Loopback
0
1
Local Loopback (toward MII)
1
0
Remote Loopback (toward line)
1
Operation is undefined
Table 4.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CS8952-IQZR | 功能描述:以太網(wǎng) IC IC 100BASE-TX and 10BASE-T Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| CS8952T | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:100BASE E-X AND 10BASE-T TRANSCEIVER |
| CS8952T-CQ | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:100BASE E-X AND 10BASE-T TRANSCEIVER |
| CS8952T-IQ | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:100BASE E-X AND 10BASE-T TRANSCEIVER |
| CS8952T-IQR | 制造商:Cirrus Logic 功能描述:ETHERNET TXRX SGL CHIP 1-PORT 5V 10MBPS/100MBPS 100TQFP - Tape and Reel |
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