參數(shù)資料
型號(hào): CS8952-IQZ
廠商: Cirrus Logic Inc
文件頁數(shù): 17/81頁
文件大?。?/td> 0K
描述: IC TXRX 100/10 PHY 100TQFP
標(biāo)準(zhǔn)包裝: 90
類型: 收發(fā)器
規(guī)程: MII
電源電壓: 4.75 V ~ 5.25 V
安裝類型: 表面貼裝
封裝/外殼: 100-LQFP
供應(yīng)商設(shè)備封裝: 100-TQFP(14x14)
包裝: 托盤
產(chǎn)品目錄頁面: 759 (CN2011-ZH PDF)
其它名稱: 598-1208
CS8952
CrystalLAN 100BASE-X and 10BASE-T Transceiver
24
DS206F1
Manchester Encoder and Decoder. Selection is
made via:
-
setting bit 14 in the Basic Mode Control
Register (address 00h) or
-
setting bits 8 and 11 in the Loopback, By-
pass, and Receiver Error Mask Register
(address 18h) or
-
asserting the LPBK pin.
3.1.3.7
Carrier Detection
The carrier detect circuit informs the MAC that val-
id receive data is present by asserting the Carrier
Sense signal (CRS) as soon it detects a valid bit pat-
tern (1010b or 0101b for 10BASE-T). During nor-
mal packet reception, CRS remains asserted while
the frame is being received, and is de-asserted
within 2.3 bit times after the last low-to-high tran-
sition of the End-of-Frame (EOF) sequence. When-
ever the receiver is idle (no receive activity), CRS
is de-asserted.
3.1.4
10BASE-T Serial Application
This mode is selected when pin 10BT_SERis as-
serted during power-up or reset, and operates simi-
lar to the 10BASE_T MII mode except that data is
transferred serially on pins RXD0 and TXD0 using
a 10 MHz RX_CLK and TX_CLK. Receive data is
framed by CRS rather than RX_DV.
3.2
Auto-Negotiation
The CS8952 supports auto-negotiation, which is
the mechanism that allows the two devices on ei-
ther end of an Ethernet link segment to share infor-
mation and automatically configure both devices
for maximum performance. When configured for
auto-negotiation, the CS8952 will detect and auto-
matically operate full-duplex at 100 Mb/s if the de-
vice on the other end of the link segment also
supports full-duplex, 100 Mb/s operation, and
auto-negotiation. The CS8952 auto-negotiation ca-
pability is fully compliant with the relevant por-
tions of section 28 of the IEEE 802.3u standard.
The CS8952 can auto-negotiate both operating
speed (10 versus 100 Mb/s), duplex mode (half du-
plex versus full duplex), and flow control (pause
frames), or alternatively can be set not to negotiate.
At power-up and reset times, the auto-negotiation
mode is selected via the auto-negotiation input pins
(AN[1:0]). This selection can later be changed us-
ing the Auto-Negotiation Advertisement Register
(address 04h).
Pins AN[1:0] are three level inputs, and have the
function shown in Table 5.
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