6.15 Descrambler Key Initialization Register - Address 16h 15 14 13 12 1" />
參數(shù)資料
型號(hào): CS8952-IQZ
廠商: Cirrus Logic Inc
文件頁(yè)數(shù): 47/81頁(yè)
文件大?。?/td> 0K
描述: IC TXRX 100/10 PHY 100TQFP
標(biāo)準(zhǔn)包裝: 90
類型: 收發(fā)器
規(guī)程: MII
電源電壓: 4.75 V ~ 5.25 V
安裝類型: 表面貼裝
封裝/外殼: 100-LQFP
供應(yīng)商設(shè)備封裝: 100-TQFP(14x14)
包裝: 托盤
產(chǎn)品目錄頁(yè)面: 759 (CN2011-ZH PDF)
其它名稱: 598-1208
CS8952
CrystalLAN 100BASE-X and 10BASE-T Transceiver
51
DS206F1
6.15
Descrambler Key Initialization Register - Address 16h
15
14
13
12
11
10
9
8
Load
Reserved
Descrambler Initialization Key
7
654
32
10
Descrambler Initialization Key
BIT
NAME
TYPE
RESET
DESCRIPTION
15
Load
Read/Set
0
When this bit is set, the descrambler will be loaded
with the value in the Descrambler Initialization Key
field. When the load is complete, this bit will clear
automatically.
14:11 Reserved
Read Only
0000
These bits should be read as don’t cares and, when
written, should be written to 0.
10:0
Descrambler Initial-
ization Key
Read/Write Reset value is
dependent on the
PHY Address field
of the Self Status
Register (address
19h).
This register allows the Descrambler to be loaded
with a user-definable key sequence. A value of 000h
has the effect of bypassing the descrambler function.
This is valuable for testing purposes to allow a deter-
ministic response to test stimulus without a synchro-
nization delay.
Note: This field is disabled, and writes to this bit are
ignored when the National Compatibility Mode bit of
the 10BASE-T Configuration Register (address 1Ch)
is set.
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